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Re: [Qemu-ppc] [PATCH v3 03/10] target/ppc: support for 32-bit carry and
From: |
Nikunj A Dadhania |
Subject: |
Re: [Qemu-ppc] [PATCH v3 03/10] target/ppc: support for 32-bit carry and overflow |
Date: |
Thu, 23 Feb 2017 12:10:14 +0530 |
User-agent: |
Notmuch/0.21 (https://notmuchmail.org) Emacs/25.0.94.1 (x86_64-redhat-linux-gnu) |
Richard Henderson <address@hidden> writes:
> Bah. Hit return too soon...
>
> On 02/22/2017 10:44 PM, Nikunj A Dadhania wrote:
>> -static void gen_read_xer(TCGv dst)
>> +static void gen_read_xer(DisasContext *ctx, TCGv dst)
>> {
>> TCGv t0 = tcg_temp_new();
>> TCGv t1 = tcg_temp_new();
>> @@ -3715,15 +3719,30 @@ static void gen_read_xer(TCGv dst)
>> tcg_gen_or_tl(t0, t0, t1);
>> tcg_gen_or_tl(dst, dst, t2);
>> tcg_gen_or_tl(dst, dst, t0);
>> + if (is_isa300(ctx)) {
>> + tcg_gen_shli_tl(t0, cpu_ov32, XER_OV32);
>> + tcg_gen_or_tl(dst, dst, t0);
>> + tcg_gen_shli_tl(t0, cpu_ca32, XER_CA32);
>> + tcg_gen_or_tl(dst, dst, t0);
>> + }
>> tcg_temp_free(t0);
>> tcg_temp_free(t1);
>> tcg_temp_free(t2);
>> }
>>
>> -static void gen_write_xer(TCGv src)
>> +static void gen_write_xer(DisasContext *ctx, TCGv src)
>> {
>> - tcg_gen_andi_tl(cpu_xer, src,
>> - ~((1u << XER_SO) | (1u << XER_OV) | (1u << XER_CA)));
>> + if (is_isa300(ctx)) {
>> + tcg_gen_andi_tl(cpu_xer, src,
>> + ~((1u << XER_SO) |
>> + (1u << XER_OV) | (1u << XER_OV32) |
>> + (1u << XER_CA) | (1u << XER_CA32)));
>> + tcg_gen_extract_tl(cpu_ov32, src, XER_OV32, 1);
>> + tcg_gen_extract_tl(cpu_ca32, src, XER_CA32, 1);
>> + } else {
>> + tcg_gen_andi_tl(cpu_xer, src,
>> + ~((1u << XER_SO) | (1u << XER_OV) | (1u <<
>> XER_CA)));
>> + }
>> tcg_gen_extract_tl(cpu_so, src, XER_SO, 1);
>> tcg_gen_extract_tl(cpu_ov, src, XER_OV, 1);
>> tcg_gen_extract_tl(cpu_ca, src, XER_CA, 1);
>
> These functions are becoming quite large. Are they performance critical
> enough
> that they need to stay as inline code, or should they be moved to helpers and
> share code with cpu_read/write_xer?
Just to boot to login prompt, these are the numbers for gen_read/write_xer:
helper_myprint - rd_count 231103, wr_count 68897
And it keeps on incrementing, maybe scope of optimization here.
Regards
Nikunj
- [Qemu-ppc] [PATCH v3 00/10] POWER9 TCG enablements - part15, Nikunj A Dadhania, 2017/02/22
- [Qemu-ppc] [PATCH v3 01/10] target/ppc: move cpu_[read, write]_xer to cpu.c, Nikunj A Dadhania, 2017/02/22
- [Qemu-ppc] [PATCH v3 03/10] target/ppc: support for 32-bit carry and overflow, Nikunj A Dadhania, 2017/02/22
- Re: [Qemu-ppc] [PATCH v3 03/10] target/ppc: support for 32-bit carry and overflow, Richard Henderson, 2017/02/22
- Re: [Qemu-ppc] [PATCH v3 03/10] target/ppc: support for 32-bit carry and overflow, Richard Henderson, 2017/02/22
- Re: [Qemu-ppc] [PATCH v3 03/10] target/ppc: support for 32-bit carry and overflow,
Nikunj A Dadhania <=
- Re: [Qemu-ppc] [Qemu-devel] [PATCH v3 03/10] target/ppc: support for 32-bit carry and overflow, Richard Henderson, 2017/02/23
- Re: [Qemu-ppc] [Qemu-devel] [PATCH v3 03/10] target/ppc: support for 32-bit carry and overflow, David Gibson, 2017/02/23
- Re: [Qemu-ppc] [Qemu-devel] [PATCH v3 03/10] target/ppc: support for 32-bit carry and overflow, Nikunj Dadhania, 2017/02/23
- Re: [Qemu-ppc] [Qemu-devel] [PATCH v3 03/10] target/ppc: support for 32-bit carry and overflow, David Gibson, 2017/02/24
- Re: [Qemu-ppc] [Qemu-devel] [PATCH v3 03/10] target/ppc: support for 32-bit carry and overflow, Richard Henderson, 2017/02/24
- Re: [Qemu-ppc] [Qemu-devel] [PATCH v3 03/10] target/ppc: support for 32-bit carry and overflow, David Gibson, 2017/02/26
Re: [Qemu-ppc] [PATCH v3 03/10] target/ppc: support for 32-bit carry and overflow, David Gibson, 2017/02/22
Re: [Qemu-ppc] [PATCH v3 03/10] target/ppc: support for 32-bit carry and overflow, Nikunj A Dadhania, 2017/02/23