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[Qemu-ppc] [PULL 12/17] target/ppc: Add execute permission checking to a
From: |
David Gibson |
Subject: |
[Qemu-ppc] [PULL 12/17] target/ppc: Add execute permission checking to access authority check |
Date: |
Fri, 3 Mar 2017 14:25:02 +1100 |
From: Suraj Jitindar Singh <address@hidden>
Basic storage protection defines various access authority permissions
based on a slb storage key and pte pp value pair. This access authority
defines read, write and execute permissions however currently we only
use this to control read and write permissions and ignore the execute
control.
Fix the code to allow execute permissions based on the key-pp value pair.
Execute is allowed under the same conditions which enable reads.
(i.e. read permission -> execute permission)
Signed-off-by: Suraj Jitindar Singh <address@hidden>
Acked-by: David Gibson <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
target/ppc/mmu-hash64.c | 9 ++++-----
1 file changed, 4 insertions(+), 5 deletions(-)
diff --git a/target/ppc/mmu-hash64.c b/target/ppc/mmu-hash64.c
index ee94f13..99f936d 100644
--- a/target/ppc/mmu-hash64.c
+++ b/target/ppc/mmu-hash64.c
@@ -308,28 +308,27 @@ static int ppc_hash64_pte_prot(PowerPCCPU *cpu,
case 0x0:
case 0x1:
case 0x2:
- prot = PAGE_READ | PAGE_WRITE;
+ prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC;
break;
case 0x3:
case 0x6:
- prot = PAGE_READ;
+ prot = PAGE_READ | PAGE_EXEC;
break;
}
} else {
switch (pp) {
case 0x0:
case 0x6:
- prot = 0;
break;
case 0x1:
case 0x3:
- prot = PAGE_READ;
+ prot = PAGE_READ | PAGE_EXEC;
break;
case 0x2:
- prot = PAGE_READ | PAGE_WRITE;
+ prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC;
break;
}
}
--
2.9.3
- [Qemu-ppc] [PULL 06/17] target/ppc: Don't gen an SDR1 on POWER9 and rework register creation, (continued)
- [Qemu-ppc] [PULL 06/17] target/ppc: Don't gen an SDR1 on POWER9 and rework register creation, David Gibson, 2017/03/02
- [Qemu-ppc] [PULL 01/17] target/ppc: Add POWER9/ISAv3.00 to compat_table, David Gibson, 2017/03/02
- [Qemu-ppc] [PULL 16/17] spapr: Small cleanup of PPC MMU enums, David Gibson, 2017/03/02
- [Qemu-ppc] [PULL 11/17] target/ppc: Add Instruction Authority Mask Register Check, David Gibson, 2017/03/02
- [Qemu-ppc] [PULL 13/17] target/ppc: Move no-execute and guarded page checking into new function, David Gibson, 2017/03/02
- [Qemu-ppc] [PULL 05/17] target/ppc: Add patb_entry to sPAPRMachineState, David Gibson, 2017/03/02
- [Qemu-ppc] [PULL 17/17] target/ppc: rewrite f[n]m[add, sub] using float64_muladd, David Gibson, 2017/03/02
- [Qemu-ppc] [PULL 04/17] target/ppc/POWER9: Add POWERPC_MMU_V3 bit, David Gibson, 2017/03/02
- [Qemu-ppc] [PULL 03/17] powernv: Don't test POWER9 CPU yet, David Gibson, 2017/03/02
- [Qemu-ppc] [PULL 02/17] exec, kvm, target-ppc: Move getrampagesize() to common code, David Gibson, 2017/03/02
- [Qemu-ppc] [PULL 12/17] target/ppc: Add execute permission checking to access authority check,
David Gibson <=
- [Qemu-ppc] [PULL 09/17] target/ppc/POWER9: Add cpu_has_work function for POWER9, David Gibson, 2017/03/02
- [Qemu-ppc] [PULL 08/17] target/ppc/POWER9: Add POWER9 pa-features definition, David Gibson, 2017/03/02
- Re: [Qemu-ppc] [Qemu-devel] [PULL 00/17] ppc-for-2.9 queue 20170303, no-reply, 2017/03/02
- Re: [Qemu-ppc] [PULL 00/17] ppc-for-2.9 queue 20170303, Peter Maydell, 2017/03/03
- Re: [Qemu-ppc] [PULL 00/17] ppc-for-2.9 queue 20170303, Peter Maydell, 2017/03/04