[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-ppc] [PULL 11/11] spapr: Correct compatibility mode setting for ho
From: |
David Gibson |
Subject: |
[Qemu-ppc] [PULL 11/11] spapr: Correct compatibility mode setting for hotplugged CPUs |
Date: |
Thu, 11 Jan 2018 15:59:37 +1100 |
Currently the pseries machine sets the compatibility mode for the
guest's cpus in two places: 1) at machine reset and 2) after CAS
negotiation.
This means that if we set or negotiate a compatiblity mode, then
hotplug a cpu, the hotplugged cpu doesn't get the right mode set and
will incorrectly have the full native features.
To correct this, we set the compatibility mode on a cpu when it is
brought online with the 'start-cpu' RTAS call. Given that we no
longer need to set the compatibility mode on all CPUs at machine
reset, so we change that to only set the mode for the boot cpu.
Signed-off-by: David Gibson <address@hidden>
Reported-by: Satheesh Rajendran <address@hidden>
Tested-by: Satheesh Rajendran <address@hidden>
Reviewed-by: Alexey Kardashevskiy <address@hidden>
---
hw/ppc/spapr.c | 2 +-
hw/ppc/spapr_rtas.c | 9 +++++++++
2 files changed, 10 insertions(+), 1 deletion(-)
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index 6785a90c60..dfd352c473 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -1504,7 +1504,7 @@ static void spapr_machine_reset(void)
spapr_ovec_cleanup(spapr->ov5_cas);
spapr->ov5_cas = spapr_ovec_new();
- ppc_set_compat_all(spapr->max_compat_pvr, &error_fatal);
+ ppc_set_compat(first_ppc_cpu, spapr->max_compat_pvr, &error_fatal);
}
fdt = spapr_build_fdt(spapr, rtas_addr, spapr->rtas_size);
diff --git a/hw/ppc/spapr_rtas.c b/hw/ppc/spapr_rtas.c
index 4bb939d3d1..2b89e1d448 100644
--- a/hw/ppc/spapr_rtas.c
+++ b/hw/ppc/spapr_rtas.c
@@ -163,6 +163,7 @@ static void rtas_start_cpu(PowerPCCPU *cpu_,
sPAPRMachineState *spapr,
CPUState *cs = CPU(cpu);
CPUPPCState *env = &cpu->env;
PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu);
+ Error *local_err = NULL;
if (!cs->halted) {
rtas_st(rets, 0, RTAS_OUT_HW_ERROR);
@@ -174,6 +175,14 @@ static void rtas_start_cpu(PowerPCCPU *cpu_,
sPAPRMachineState *spapr,
* new cpu enters */
kvm_cpu_synchronize_state(cs);
+ /* Set compatibility mode to match existing cpus */
+ ppc_set_compat(cpu, POWERPC_CPU(first_cpu)->compat_pvr, &local_err);
+ if (local_err) {
+ error_report_err(local_err);
+ rtas_st(rets, 0, RTAS_OUT_HW_ERROR);
+ return;
+ }
+
env->msr = (1ULL << MSR_SF) | (1ULL << MSR_ME);
/* Enable Power-saving mode Exit Cause exceptions for the new CPU */
--
2.14.3
- [Qemu-ppc] [PULL 00/11] ppc-for-2.12 queue 20180111, David Gibson, 2018/01/11
- [Qemu-ppc] [PULL 02/11] sm501: Add panel hardware cursor registers also to read function, David Gibson, 2018/01/11
- [Qemu-ppc] [PULL 03/11] sm501: Add some more unimplemented registers, David Gibson, 2018/01/11
- [Qemu-ppc] [PULL 10/11] hw/ppc: Remove the deprecated spapr-pci-vfio-host-bridge device, David Gibson, 2018/01/11
- [Qemu-ppc] [PULL 09/11] Update dtc to fix compilation problem on Mac OS 10.6, David Gibson, 2018/01/11
- [Qemu-ppc] [PULL 05/11] spapr_pci: use warn_report(), David Gibson, 2018/01/11
- [Qemu-ppc] [PULL 11/11] spapr: Correct compatibility mode setting for hotplugged CPUs,
David Gibson <=
- [Qemu-ppc] [PULL 04/11] ppc4xx_i2c: Implement basic I2C functions, David Gibson, 2018/01/11
- [Qemu-ppc] [PULL 06/11] hw/ide: Emulate SiI3112 SATA controller, David Gibson, 2018/01/11
- [Qemu-ppc] [PULL 07/11] ppc/pnv: change powernv_ prefix to pnv_ for overall naming consistency, David Gibson, 2018/01/11
- [Qemu-ppc] [PULL 08/11] target/ppc: more use of the PPC_*() macros, David Gibson, 2018/01/11
- [Qemu-ppc] [PULL 01/11] pseries: Update SLOF firmware image to qemu-slof-20171214, David Gibson, 2018/01/11
- Re: [Qemu-ppc] [PULL 00/11] ppc-for-2.12 queue 20180111, Peter Maydell, 2018/01/11