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Re: [PATCH v4 13/25] ppc/xive: Introduce a xive_tctx_ipb_update() helper
From: |
Cédric Le Goater |
Subject: |
Re: [PATCH v4 13/25] ppc/xive: Introduce a xive_tctx_ipb_update() helper |
Date: |
Thu, 3 Oct 2019 11:30:32 +0200 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.1.0 |
On 03/10/2019 04:11, David Gibson wrote:
> On Wed, Sep 18, 2019 at 06:06:33PM +0200, Cédric Le Goater wrote:
>> We will use it to resend missed interrupts when a vCPU context is
>> pushed a HW thread.
>>
>> Signed-off-by: Cédric Le Goater <address@hidden>
>> ---
>> include/hw/ppc/xive.h | 1 +
>> hw/intc/xive.c | 15 +++++++++++----
>> 2 files changed, 12 insertions(+), 4 deletions(-)
>>
>> diff --git a/include/hw/ppc/xive.h b/include/hw/ppc/xive.h
>> index f35ff3b64791..a461753f5da5 100644
>> --- a/include/hw/ppc/xive.h
>> +++ b/include/hw/ppc/xive.h
>> @@ -467,6 +467,7 @@ uint64_t xive_tctx_tm_read(XivePresenter *xptr, XiveTCTX
>> *tctx, hwaddr offset,
>>
>> void xive_tctx_pic_print_info(XiveTCTX *tctx, Monitor *mon);
>> Object *xive_tctx_create(Object *cpu, XiveRouter *xrtr, Error **errp);
>> +void xive_tctx_ipb_update(XiveTCTX *tctx, uint8_t ring, uint8_t ipb);
>>
>> static inline uint32_t xive_nvt_cam_line(uint8_t nvt_blk, uint32_t nvt_idx)
>> {
>> diff --git a/hw/intc/xive.c b/hw/intc/xive.c
>> index 68d3361d1c3f..5f7c37b091a7 100644
>> --- a/hw/intc/xive.c
>> +++ b/hw/intc/xive.c
>> @@ -135,6 +135,15 @@ static void xive_tctx_set_cppr(XiveTCTX *tctx, uint8_t
>> ring, uint8_t cppr)
>> xive_tctx_notify(tctx, ring);
>> }
>>
>> +void xive_tctx_ipb_update(XiveTCTX *tctx, uint8_t ring, uint8_t ipb)
>> +{
>> + uint8_t *regs = &tctx->regs[ring];
>> +
>> + regs[TM_IPB] |= ipb;
>> + regs[TM_PIPR] = ipb_to_pipr(regs[TM_IPB]);
>
> You're opencoding the existing ipb_update() here, but not eliminating
> it. That doesn't seem like a good idea.
It is in patch 15 when the IPB is correctly recorded in the NVT.
I can move that part before patch 13 to make things clearer.
C.
>> + xive_tctx_notify(tctx, ring);
>> +}
>> +
>> static inline uint32_t xive_tctx_word2(uint8_t *ring)
>> {
>> return *((uint32_t *) &ring[TM_WORD2]);
>> @@ -336,8 +345,7 @@ static void xive_tm_set_os_cppr(XivePresenter *xptr,
>> XiveTCTX *tctx,
>> static void xive_tm_set_os_pending(XivePresenter *xptr, XiveTCTX *tctx,
>> hwaddr offset, uint64_t value, unsigned
>> size)
>> {
>> - ipb_update(&tctx->regs[TM_QW1_OS], value & 0xff);
>> - xive_tctx_notify(tctx, TM_QW1_OS);
>> + xive_tctx_ipb_update(tctx, TM_QW1_OS, priority_to_ipb(value & 0xff));
>> }
>>
>> static uint64_t xive_tm_pull_os_ctx(XivePresenter *xptr, XiveTCTX *tctx,
>> @@ -1382,8 +1390,7 @@ static bool xive_presenter_notify(uint8_t format,
>>
>> /* handle CPU exception delivery */
>> if (count) {
>> - ipb_update(&match.tctx->regs[match.ring], priority);
>> - xive_tctx_notify(match.tctx, match.ring);
>> + xive_tctx_ipb_update(match.tctx, match.ring,
>> priority_to_ipb(priority));
>> }
>>
>> return count;
>