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[PULL 04/18] ppc/pnv: Add support for NMI interface
From: |
David Gibson |
Subject: |
[PULL 04/18] ppc/pnv: Add support for NMI interface |
Date: |
Thu, 7 May 2020 15:02:14 +1000 |
From: Nicholas Piggin <address@hidden>
This implements the NMI interface for the PNV machine, similarly to
commit 3431648272d ("spapr: Add support for new NMI interface") for
SPAPR.
Signed-off-by: Nicholas Piggin <address@hidden>
Message-Id: <address@hidden>
Reviewed-by: Cédric Le Goater <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
hw/ppc/pnv.c | 29 +++++++++++++++++++++++++++++
1 file changed, 29 insertions(+)
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
index c9cb6fa357..a3b7a8d0ff 100644
--- a/hw/ppc/pnv.c
+++ b/hw/ppc/pnv.c
@@ -27,6 +27,7 @@
#include "sysemu/runstate.h"
#include "sysemu/cpus.h"
#include "sysemu/device_tree.h"
+#include "sysemu/hw_accel.h"
#include "target/ppc/cpu.h"
#include "qemu/log.h"
#include "hw/ppc/fdt.h"
@@ -34,6 +35,7 @@
#include "hw/ppc/pnv.h"
#include "hw/ppc/pnv_core.h"
#include "hw/loader.h"
+#include "hw/nmi.h"
#include "exec/address-spaces.h"
#include "qapi/visitor.h"
#include "monitor/monitor.h"
@@ -1977,10 +1979,35 @@ static void pnv_machine_set_hb(Object *obj, bool value,
Error **errp)
}
}
+static void pnv_cpu_do_nmi_on_cpu(CPUState *cs, run_on_cpu_data arg)
+{
+ PowerPCCPU *cpu = POWERPC_CPU(cs);
+ CPUPPCState *env = &cpu->env;
+
+ cpu_synchronize_state(cs);
+ ppc_cpu_do_system_reset(cs);
+ /*
+ * SRR1[42:45] is set to 0100 which the ISA defines as implementation
+ * dependent. POWER processors use this for xscom triggered interrupts,
+ * which come from the BMC or NMI IPIs.
+ */
+ env->spr[SPR_SRR1] |= PPC_BIT(43);
+}
+
+static void pnv_nmi(NMIState *n, int cpu_index, Error **errp)
+{
+ CPUState *cs;
+
+ CPU_FOREACH(cs) {
+ async_run_on_cpu(cs, pnv_cpu_do_nmi_on_cpu, RUN_ON_CPU_NULL);
+ }
+}
+
static void pnv_machine_class_init(ObjectClass *oc, void *data)
{
MachineClass *mc = MACHINE_CLASS(oc);
InterruptStatsProviderClass *ispc = INTERRUPT_STATS_PROVIDER_CLASS(oc);
+ NMIClass *nc = NMI_CLASS(oc);
mc->desc = "IBM PowerNV (Non-Virtualized)";
mc->init = pnv_init;
@@ -1997,6 +2024,7 @@ static void pnv_machine_class_init(ObjectClass *oc, void
*data)
mc->default_ram_size = INITRD_LOAD_ADDR + INITRD_MAX_SIZE;
mc->default_ram_id = "pnv.ram";
ispc->print_info = pnv_pic_print_info;
+ nc->nmi_monitor_handler = pnv_nmi;
object_class_property_add_bool(oc, "hb-mode",
pnv_machine_get_hb, pnv_machine_set_hb,
@@ -2060,6 +2088,7 @@ static const TypeInfo types[] = {
.class_size = sizeof(PnvMachineClass),
.interfaces = (InterfaceInfo[]) {
{ TYPE_INTERRUPT_STATS_PROVIDER },
+ { TYPE_NMI },
{ },
},
},
--
2.26.2
- [PULL 00/18] ppc-for-5.1 queue 20200507, David Gibson, 2020/05/07
- [PULL 03/18] ppc/spapr: tweak change system reset helper, David Gibson, 2020/05/07
- [PULL 01/18] target/ppc: Improve syscall exception logging, David Gibson, 2020/05/07
- [PULL 04/18] ppc/pnv: Add support for NMI interface,
David Gibson <=
- [PULL 02/18] spapr: Don't check capabilities removed between CAS calls, David Gibson, 2020/05/07
- [PULL 11/18] spapr: Don't allow unplug of NVLink2 devices, David Gibson, 2020/05/07
- [PULL 07/18] spapr: Drop CAS reboot flag, David Gibson, 2020/05/07
- [PULL 06/18] spapr/cas: Separate CAS handling from rebuilding the FDT, David Gibson, 2020/05/07
- [PULL 05/18] spapr: Simplify selection of radix/hash during CAS, David Gibson, 2020/05/07
- [PULL 09/18] target/ppc: Introduce a relocation bool in ppc_radix64_handle_mmu_fault(), David Gibson, 2020/05/07
- [PULL 15/18] target/ppc: Add support for Radix partition-scoped translation, David Gibson, 2020/05/07
- [PULL 08/18] target/ppc: Enforce that the root page directory size must be at least 5, David Gibson, 2020/05/07
- [PULL 16/18] spapr_nvdimm.c: make 'label-size' mandatory, David Gibson, 2020/05/07
- [PULL 17/18] spapr_nvdimm: Tweak error messages, David Gibson, 2020/05/07