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[PULL 04/33] spapr/xive: Add a 'hv-prio' property to represent the KVM e
From: |
David Gibson |
Subject: |
[PULL 04/33] spapr/xive: Add a 'hv-prio' property to represent the KVM escalation priority |
Date: |
Tue, 8 Sep 2020 15:19:24 +1000 |
From: Cédric Le Goater <clg@kaod.org>
On POWER9, the KVM XIVE device uses priority 7 for the escalation
interrupts. On POWER10, the host can use a reduced set of priorities
and KVM will configure the escalation priority to a lower number. In
any case, the guest is allowed to use priorities in a single range :
[ 0 .. (maxprio - 1) ].
Introduce a 'hv-prio' property to represent the escalation priority
number and use it to compute the "ibm,plat-res-int-priorities"
property defining the priority ranges reserved by the hypervisor.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20200819130843.2230799-2-clg@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
hw/intc/spapr_xive.c | 33 ++++++++++++++-------------------
include/hw/ppc/spapr_xive.h | 2 ++
2 files changed, 16 insertions(+), 19 deletions(-)
diff --git a/hw/intc/spapr_xive.c b/hw/intc/spapr_xive.c
index 4bd0d606ba..1fa09f287a 100644
--- a/hw/intc/spapr_xive.c
+++ b/hw/intc/spapr_xive.c
@@ -595,6 +595,7 @@ static Property spapr_xive_properties[] = {
DEFINE_PROP_UINT32("nr-ends", SpaprXive, nr_ends, 0),
DEFINE_PROP_UINT64("vc-base", SpaprXive, vc_base, SPAPR_XIVE_VC_BASE),
DEFINE_PROP_UINT64("tm-base", SpaprXive, tm_base, SPAPR_XIVE_TM_BASE),
+ DEFINE_PROP_UINT8("hv-prio", SpaprXive, hv_prio, 7),
DEFINE_PROP_END_OF_LIST(),
};
@@ -692,12 +693,13 @@ static void spapr_xive_dt(SpaprInterruptController *intc,
uint32_t nr_servers,
cpu_to_be32(16), /* 64K */
};
/*
- * The following array is in sync with the reserved priorities
- * defined by the 'spapr_xive_priority_is_reserved' routine.
+ * QEMU/KVM only needs to define a single range to reserve the
+ * escalation priority. A priority bitmask would have been more
+ * appropriate.
*/
uint32_t plat_res_int_priorities[] = {
- cpu_to_be32(7), /* start */
- cpu_to_be32(0xf8), /* count */
+ cpu_to_be32(xive->hv_prio), /* start */
+ cpu_to_be32(0xff - xive->hv_prio), /* count */
};
/* Thread Interrupt Management Area : User (ring 3) and OS (ring 2) */
@@ -844,19 +846,12 @@ type_init(spapr_xive_register_types)
*/
/*
- * Linux hosts under OPAL reserve priority 7 for their own escalation
- * interrupts (DD2.X POWER9). So we only allow the guest to use
- * priorities [0..6].
+ * On POWER9, the KVM XIVE device uses priority 7 for the escalation
+ * interrupts. So we only allow the guest to use priorities [0..6].
*/
-static bool spapr_xive_priority_is_reserved(uint8_t priority)
+static bool spapr_xive_priority_is_reserved(SpaprXive *xive, uint8_t priority)
{
- switch (priority) {
- case 0 ... 6:
- return false;
- case 7: /* OPAL escalation queue */
- default:
- return true;
- }
+ return priority >= xive->hv_prio;
}
/*
@@ -1053,7 +1048,7 @@ static target_ulong h_int_set_source_config(PowerPCCPU
*cpu,
new_eas.w = eas.w & cpu_to_be64(~EAS_MASKED);
}
- if (spapr_xive_priority_is_reserved(priority)) {
+ if (spapr_xive_priority_is_reserved(xive, priority)) {
qemu_log_mask(LOG_GUEST_ERROR, "XIVE: priority " TARGET_FMT_ld
" is reserved\n", priority);
return H_P4;
@@ -1212,7 +1207,7 @@ static target_ulong h_int_get_queue_info(PowerPCCPU *cpu,
* This is not needed when running the emulation under QEMU
*/
- if (spapr_xive_priority_is_reserved(priority)) {
+ if (spapr_xive_priority_is_reserved(xive, priority)) {
qemu_log_mask(LOG_GUEST_ERROR, "XIVE: priority " TARGET_FMT_ld
" is reserved\n", priority);
return H_P3;
@@ -1299,7 +1294,7 @@ static target_ulong h_int_set_queue_config(PowerPCCPU
*cpu,
* This is not needed when running the emulation under QEMU
*/
- if (spapr_xive_priority_is_reserved(priority)) {
+ if (spapr_xive_priority_is_reserved(xive, priority)) {
qemu_log_mask(LOG_GUEST_ERROR, "XIVE: priority " TARGET_FMT_ld
" is reserved\n", priority);
return H_P3;
@@ -1466,7 +1461,7 @@ static target_ulong h_int_get_queue_config(PowerPCCPU
*cpu,
* This is not needed when running the emulation under QEMU
*/
- if (spapr_xive_priority_is_reserved(priority)) {
+ if (spapr_xive_priority_is_reserved(xive, priority)) {
qemu_log_mask(LOG_GUEST_ERROR, "XIVE: priority " TARGET_FMT_ld
" is reserved\n", priority);
return H_P3;
diff --git a/include/hw/ppc/spapr_xive.h b/include/hw/ppc/spapr_xive.h
index a1c8540ab4..26c8d90d71 100644
--- a/include/hw/ppc/spapr_xive.h
+++ b/include/hw/ppc/spapr_xive.h
@@ -49,6 +49,8 @@ typedef struct SpaprXive {
void *tm_mmap;
MemoryRegion tm_mmio_kvm;
VMChangeStateEntry *change;
+
+ uint8_t hv_prio;
} SpaprXive;
typedef struct SpaprXiveClass {
--
2.26.2
- [PULL 00/33] ppc-for-5.2 queue 20200908, David Gibson, 2020/09/08
- [PULL 01/33] adb: Correct class size on TYPE_ADB_DEVICE, David Gibson, 2020/09/08
- [PULL 02/33] ppc/pnv: Fix TypeInfo of PnvLpcController abstract class, David Gibson, 2020/09/08
- [PULL 03/33] spapr: Remove unnecessary DRC type-checker macros, David Gibson, 2020/09/08
- [PULL 04/33] spapr/xive: Add a 'hv-prio' property to represent the KVM escalation priority,
David Gibson <=
- [PULL 07/33] spapr/xive: Use the xics flag to check for XIVE-only IRQ backends, David Gibson, 2020/09/08
- [PULL 05/33] ppc/pnv: Add a HIOMAP erase command, David Gibson, 2020/09/08
- [PULL 08/33] spapr/xive: Modify kvm_cpu_is_enabled() interface, David Gibson, 2020/09/08
- [PULL 06/33] spapr_vscsi: do not allow device hotplug, David Gibson, 2020/09/08
- [PULL 09/33] spapr/xive: Use kvmppc_xive_source_reset() in post_load, David Gibson, 2020/09/08
- [PULL 10/33] spapr/xive: Allocate IPIs independently from the other sources, David Gibson, 2020/09/08
- [PULL 11/33] spapr/xive: Allocate vCPU IPIs from the vCPU contexts, David Gibson, 2020/09/08
- [PULL 12/33] ppc/spapr_nvdimm: use g_autofree in spapr_nvdimm_validate_opts(), David Gibson, 2020/09/08
- [PULL 13/33] spapr, spapr_nvdimm: fold NVDIMM validation in the same place, David Gibson, 2020/09/08
- [PULL 14/33] ppc/spapr_nvdimm: do not enable support with 'nvdimm=off', David Gibson, 2020/09/08