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Re: [PATCH v6 12/14] target/ppc: Implement vcfuged instruction
From: |
David Gibson |
Subject: |
Re: [PATCH v6 12/14] target/ppc: Implement vcfuged instruction |
Date: |
Wed, 2 Jun 2021 18:51:49 +1000 |
On Tue, Jun 01, 2021 at 02:09:22PM -0700, Richard Henderson wrote:
> On 6/1/21 12:35 PM, matheus.ferst@eldorado.org.br wrote:
> > +++ b/target/ppc/translate/vector-impl.c.inc
> > @@ -0,0 +1,56 @@
> > +/*
> > + * Power ISA decode for Vector Facility instructions
> > + *
> > + * Copyright (c) 2021 Instituto de Pesquisas Eldorado (eldorado.org.br)
> > + *
> > + * This library is free software; you can redistribute it and/or
> > + * modify it under the terms of the GNU Lesser General Public
> > + * License as published by the Free Software Foundation; either
> > + * version 2.1 of the License, or (at your option) any later version.
> > + *
> > + * This library is distributed in the hope that it will be useful,
> > + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> > + * Lesser General Public License for more details.
> > + *
> > + * You should have received a copy of the GNU Lesser General Public
> > + * License along with this library; if not, see
> > <http://www.gnu.org/licenses/>.
> > + */
> > +
> > +#define REQUIRE_ALTIVEC(CTX) \
> > + do { \
> > + if (unlikely(!(CTX)->altivec_enabled)) { \
> > + gen_exception((CTX), POWERPC_EXCP_VPU); \
> > + return true; \
> > + } \
> > + } while (0)
>
> I think it would be better to name this REQUIRE_VECTOR, to match the
> Vector_Unavailable() pseudo-code in the current manual.
>
> Also, I think you should place this in translate.c, because you will also
> need this for VSX.
I think those can reasonably be followup changes.
>
> Otherwise,
> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
>
>
> r~
>
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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- [PATCH v6 05/14] target/ppc: Implement PNOP, (continued)
- [PATCH v6 05/14] target/ppc: Implement PNOP, matheus . ferst, 2021/06/01
- [PATCH v6 06/14] target/ppc: Move D/DS/X-form integer loads to decodetree, matheus . ferst, 2021/06/01
- [PATCH v6 07/14] target/ppc: Implement prefixed integer load instructions, matheus . ferst, 2021/06/01
- [PATCH v6 08/14] target/ppc: Move D/DS/X-form integer stores to decodetree, matheus . ferst, 2021/06/01
- [PATCH v6 09/14] target/ppc: Implement prefixed integer store instructions, matheus . ferst, 2021/06/01
- [PATCH v6 10/14] target/ppc: Implement setbc/setbcr/stnbc/setnbcr instructions, matheus . ferst, 2021/06/01
- [PATCH v6 11/14] target/ppc: Implement cfuged instruction, matheus . ferst, 2021/06/01
- [PATCH v6 12/14] target/ppc: Implement vcfuged instruction, matheus . ferst, 2021/06/01
- [PATCH v6 13/14] target/ppc: Move addpcis to decodetree, matheus . ferst, 2021/06/01
- [PATCH v6 14/14] target/ppc: Move cmp/cmpi/cmpl/cmpli to decodetree, matheus . ferst, 2021/06/01
- Re: [PATCH v6 00/14] Base for adding PowerPC 64-bit instructions, David Gibson, 2021/06/02