[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PULL 045/102] target/ppc: Update fre to new flags
From: |
Cédric Le Goater |
Subject: |
[PULL 045/102] target/ppc: Update fre to new flags |
Date: |
Wed, 15 Dec 2021 18:03:00 +0100 |
From: Richard Henderson <richard.henderson@linaro.org>
Use float_flag_invalid_snan instead of recomputing
the snan-ness of the operand.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20211119160502.17432-27-richard.henderson@linaro.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
---
target/ppc/fpu_helper.c | 21 ++++++++-------------
1 file changed, 8 insertions(+), 13 deletions(-)
diff --git a/target/ppc/fpu_helper.c b/target/ppc/fpu_helper.c
index 853e0aad1d4e..aef81a818f63 100644
--- a/target/ppc/fpu_helper.c
+++ b/target/ppc/fpu_helper.c
@@ -765,20 +765,15 @@ float64 helper_fre(CPUPPCState *env, float64 arg)
{
/* "Estimate" the reciprocal with actual division. */
float64 ret = float64_div(float64_one, arg, &env->fp_status);
- int status = get_float_exception_flags(&env->fp_status);
+ int flags = get_float_exception_flags(&env->fp_status);
- if (unlikely(status)) {
- if (status & float_flag_invalid) {
- if (float64_is_signaling_nan(arg, &env->fp_status)) {
- /* sNaN reciprocal */
- float_invalid_op_vxsnan(env, GETPC());
- }
- }
- if (status & float_flag_divbyzero) {
- float_zero_divide_excp(env, GETPC());
- /* For FPSCR.ZE == 0, the result is 1/2. */
- ret = float64_set_sign(float64_half, float64_is_neg(arg));
- }
+ if (unlikely(flags & float_flag_invalid_snan)) {
+ float_invalid_op_vxsnan(env, GETPC());
+ }
+ if (unlikely(flags & float_flag_divbyzero)) {
+ float_zero_divide_excp(env, GETPC());
+ /* For FPSCR.ZE == 0, the result is 1/2. */
+ ret = float64_set_sign(float64_half, float64_is_neg(arg));
}
return ret;
--
2.31.1
- [PULL 060/102] target/ppc: remove 401/403 CPUs, (continued)
- [PULL 060/102] target/ppc: remove 401/403 CPUs, Cédric Le Goater, 2021/12/15
- [PULL 055/102] target/ppc: Disable unused facilities in the e600 CPU, Cédric Le Goater, 2021/12/15
- [PULL 046/102] softfloat: Add float64r32 arithmetic routines, Cédric Le Goater, 2021/12/15
- [PULL 062/102] ppc: Mark the 'taihu' machine as deprecated, Cédric Le Goater, 2021/12/15
- [PULL 066/102] ppc/ppc405: Change ppc405ep_init() return value, Cédric Le Goater, 2021/12/15
- [PULL 058/102] target/ppc: Remove 603e exception model, Cédric Le Goater, 2021/12/15
- [PULL 056/102] target/ppc: Remove the software TLB model of 7450 CPUs, Cédric Le Goater, 2021/12/15
- [PULL 063/102] ppc: Add trace-events for DCR accesses, Cédric Le Goater, 2021/12/15
- [PULL 064/102] ppc/ppc405: Convert printfs to trace-events, Cédric Le Goater, 2021/12/15
- [PULL 043/102] target/ppc: Update sqrt for new flags, Cédric Le Goater, 2021/12/15
- [PULL 045/102] target/ppc: Update fre to new flags,
Cédric Le Goater <=
- [PULL 057/102] target/ppc: Fix MPCxxx FPU interrupt address, Cédric Le Goater, 2021/12/15
- [PULL 068/102] ppc/ppc405: Remove flash support, Cédric Le Goater, 2021/12/15
- [PULL 070/102] ppc/ppc405: Introduce ppc405_set_default_bootinfo(), Cédric Le Goater, 2021/12/15
- [PULL 075/102] target/ppc: Fix xs{max, min}[cj]dp to use VSX registers, Cédric Le Goater, 2021/12/15
- [PULL 080/102] Revert "target/ppc: Move SPR_DSISR setting to powerpc_excp", Cédric Le Goater, 2021/12/15
- [PULL 059/102] target/ppc: Set 601v exception model id, Cédric Le Goater, 2021/12/15
- [PULL 067/102] ppc/ppc405: Add some address space definitions, Cédric Le Goater, 2021/12/15
- [PULL 061/102] ppc/ppc405: Change kernel load address, Cédric Le Goater, 2021/12/15
- [PULL 072/102] ppc/ppc405: Change default PLL values at reset, Cédric Le Goater, 2021/12/15
- [PULL 073/102] ppc/ppc405: Fix bi_pci_enetaddr2 field in U-Boot board information, Cédric Le Goater, 2021/12/15