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[PATCH 10/11] target/ppc: 6xx: Software TLB exceptions cleanup
From: |
Fabiano Rosas |
Subject: |
[PATCH 10/11] target/ppc: 6xx: Software TLB exceptions cleanup |
Date: |
Thu, 3 Feb 2022 17:09:56 -0300 |
This code applies only to the 6xx CPUs, so we can remove the switch
statement.
Signed-off-by: Fabiano Rosas <farosas@linux.ibm.com>
---
target/ppc/excp_helper.c | 31 +++++++++++--------------------
1 file changed, 11 insertions(+), 20 deletions(-)
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
index 538905c4dd..80168355bd 100644
--- a/target/ppc/excp_helper.c
+++ b/target/ppc/excp_helper.c
@@ -553,7 +553,6 @@ static void powerpc_excp_6xx(PowerPCCPU *cpu, int excp)
{
CPUState *cs = CPU(cpu);
CPUPPCState *env = &cpu->env;
- int excp_model = env->excp_model;
target_ulong msr, new_msr, vector;
int srr0, srr1;
@@ -695,26 +694,18 @@ static void powerpc_excp_6xx(PowerPCCPU *cpu, int excp)
case POWERPC_EXCP_IFTLB: /* Instruction fetch TLB error */
case POWERPC_EXCP_DLTLB: /* Data load TLB miss */
case POWERPC_EXCP_DSTLB: /* Data store TLB miss */
- switch (excp_model) {
- case POWERPC_EXCP_6xx:
- /* Swap temporary saved registers with GPRs */
- if (!(new_msr & ((target_ulong)1 << MSR_TGPR))) {
- new_msr |= (target_ulong)1 << MSR_TGPR;
- hreg_swap_gpr_tgpr(env);
- }
- /* fall through */
- case POWERPC_EXCP_7x5:
- ppc_excp_debug_sw_tlb(env, excp);
-
- msr |= env->crf[0] << 28;
- msr |= env->error_code; /* key, D/I, S/L bits */
- /* Set way using a LRU mechanism */
- msr |= ((env->last_way + 1) & (env->nb_ways - 1)) << 17;
- break;
- default:
- cpu_abort(cs, "Invalid TLB miss exception\n");
- break;
+ /* Swap temporary saved registers with GPRs */
+ if (!(new_msr & ((target_ulong)1 << MSR_TGPR))) {
+ new_msr |= (target_ulong)1 << MSR_TGPR;
+ hreg_swap_gpr_tgpr(env);
}
+
+ ppc_excp_debug_sw_tlb(env, excp);
+
+ msr |= env->crf[0] << 28;
+ msr |= env->error_code; /* key, D/I, S/L bits */
+ /* Set way using a LRU mechanism */
+ msr |= ((env->last_way + 1) & (env->nb_ways - 1)) << 17;
break;
case POWERPC_EXCP_FPA: /* Floating-point assist exception */
case POWERPC_EXCP_DABR: /* Data address breakpoint */
--
2.34.1
- [PATCH 00/11] target/ppc: powerpc_excp improvements [6xx] (7/n), Fabiano Rosas, 2022/02/03
- [PATCH 02/11] target/ppc: Introduce powerpc_excp_6xx, Fabiano Rosas, 2022/02/03
- [PATCH 01/11] target/ppc: Merge exception model IDs for 6xx CPUs, Fabiano Rosas, 2022/02/03
- [PATCH 03/11] target/ppc: Simplify powerpc_excp_6xx, Fabiano Rosas, 2022/02/03
- [PATCH 06/11] target/ppc: 6xx: External interrupt cleanup, Fabiano Rosas, 2022/02/03
- [PATCH 07/11] target/ppc: 6xx: Program exception cleanup, Fabiano Rosas, 2022/02/03
- [PATCH 10/11] target/ppc: 6xx: Software TLB exceptions cleanup,
Fabiano Rosas <=
- [PATCH 05/11] target/ppc: 6xx: Machine Check exception cleanup, Fabiano Rosas, 2022/02/03
- [PATCH 04/11] target/ppc: 6xx: Critical exception cleanup, Fabiano Rosas, 2022/02/03
- [PATCH 08/11] target/ppc: 6xx: System Call exception cleanup, Fabiano Rosas, 2022/02/03
- [PATCH 09/11] target/ppc: 6xx: System Reset interrupt cleanup, Fabiano Rosas, 2022/02/03
- [PATCH 11/11] target/ppc: 6xx: Set SRRs directly in exception code, Fabiano Rosas, 2022/02/03