-#define VSX_MAX_MINC(name, max) \
+#define VSX_MAX_MINC(name, op, tp, fld) \
void helper_##name(CPUPPCState *env,
\
ppc_vsr_t *xt, ppc_vsr_t *xa, ppc_vsr_t *xb)
\
{
\
ppc_vsr_t t = { };
\
bool vxsnan_flag = false, vex_flag = false;
\
\
- if (unlikely(float64_is_any_nan(xa->VsrD(0)) || \
- float64_is_any_nan(xb->VsrD(0)))) { \
- if (float64_is_signaling_nan(xa->VsrD(0), &env->fp_status) || \
- float64_is_signaling_nan(xb->VsrD(0), &env->fp_status)) { \
+ if (unlikely(tp##_is_any_nan(xa->fld) || \
+ tp##_is_any_nan(xb->fld))) { \
+ if (tp##_is_signaling_nan(xa->fld, &env->fp_status) || \
+ tp##_is_signaling_nan(xb->fld, &env->fp_status)) { \
vxsnan_flag = true;
\
}
\
- t.VsrD(0) = xb->VsrD(0); \
- } else if ((max && \
- !float64_lt(xa->VsrD(0), xb->VsrD(0), &env->fp_status)) || \
- (!max && \
- float64_lt(xa->VsrD(0), xb->VsrD(0), &env->fp_status))) { \
- t.VsrD(0) = xa->VsrD(0); \
+ t.fld = xb->fld; \
} else {
\
- t.VsrD(0) = xb->VsrD(0); \
+ t.fld = tp##_##op(xa->fld, xb->fld, &env->fp_status); \
}
\
\
vex_flag = fpscr_ve & vxsnan_flag;
\