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[PATCH v2 13/16] ppc/pnv: remove pnv-phb4-root-port
From: |
Daniel Henrique Barboza |
Subject: |
[PATCH v2 13/16] ppc/pnv: remove pnv-phb4-root-port |
Date: |
Tue, 31 May 2022 18:49:14 -0300 |
The unified pnv-phb-root-port can be used instead. The phb4-root-port
device isn't exposed to the user in any official QEMU release so there's
no ABI breakage in removing it.
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
---
hw/pci-host/pnv_phb.c | 4 +-
hw/pci-host/pnv_phb4.c | 100 ---------------------------------
hw/pci-host/pnv_phb4_pec.c | 4 +-
include/hw/pci-host/pnv_phb4.h | 9 ---
4 files changed, 4 insertions(+), 113 deletions(-)
diff --git a/hw/pci-host/pnv_phb.c b/hw/pci-host/pnv_phb.c
index d1e8d28e97..f1c106edf1 100644
--- a/hw/pci-host/pnv_phb.c
+++ b/hw/pci-host/pnv_phb.c
@@ -39,11 +39,11 @@ static void pnv_phb_realize(DeviceState *dev, Error **errp)
break;
case 4:
phb_typename = g_strdup(TYPE_PNV_PHB4);
- phb_rootport_typename = g_strdup(TYPE_PNV_PHB4_ROOT_PORT);
+ phb_rootport_typename = g_strdup(TYPE_PNV_PHB_ROOT_PORT);
break;
case 5:
phb_typename = g_strdup(TYPE_PNV_PHB5);
- phb_rootport_typename = g_strdup(TYPE_PNV_PHB5_ROOT_PORT);
+ phb_rootport_typename = g_strdup(TYPE_PNV_PHB_ROOT_PORT);
break;
default:
g_assert_not_reached();
diff --git a/hw/pci-host/pnv_phb4.c b/hw/pci-host/pnv_phb4.c
index 8a907a77a7..ba553ae25e 100644
--- a/hw/pci-host/pnv_phb4.c
+++ b/hw/pci-host/pnv_phb4.c
@@ -1817,109 +1817,9 @@ static const TypeInfo pnv_phb4_root_bus_info = {
},
};
-static void pnv_phb4_root_port_reset(DeviceState *dev)
-{
- PCIERootPortClass *rpc = PCIE_ROOT_PORT_GET_CLASS(dev);
- PCIDevice *d = PCI_DEVICE(dev);
- uint8_t *conf = d->config;
-
- rpc->parent_reset(dev);
-
- pci_byte_test_and_set_mask(conf + PCI_IO_BASE,
- PCI_IO_RANGE_MASK & 0xff);
- pci_byte_test_and_clear_mask(conf + PCI_IO_LIMIT,
- PCI_IO_RANGE_MASK & 0xff);
- pci_set_word(conf + PCI_MEMORY_BASE, 0);
- pci_set_word(conf + PCI_MEMORY_LIMIT, 0xfff0);
- pci_set_word(conf + PCI_PREF_MEMORY_BASE, 0x1);
- pci_set_word(conf + PCI_PREF_MEMORY_LIMIT, 0xfff1);
- pci_set_long(conf + PCI_PREF_BASE_UPPER32, 0x1); /* Hack */
- pci_set_long(conf + PCI_PREF_LIMIT_UPPER32, 0xffffffff);
- pci_config_set_interrupt_pin(conf, 0);
-}
-
-static void pnv_phb4_root_port_realize(DeviceState *dev, Error **errp)
-{
- PCIERootPortClass *rpc = PCIE_ROOT_PORT_GET_CLASS(dev);
- PCIDevice *pci = PCI_DEVICE(dev);
- PCIBus *bus = pci_get_bus(pci);
- PnvPHB *phb = NULL;
- Error *local_err = NULL;
-
- phb = (PnvPHB *) object_dynamic_cast(OBJECT(bus->qbus.parent),
- TYPE_PNV_PHB);
-
- if (!phb) {
- error_setg(errp, "%s must be connected to pnv-phb4 buses", dev->id);
- return;
- }
-
- /* Set unique chassis/slot values for the root port */
- qdev_prop_set_uint8(&pci->qdev, "chassis", phb->chip_id);
- qdev_prop_set_uint16(&pci->qdev, "slot", phb->phb_id);
-
- rpc->parent_realize(dev, &local_err);
- if (local_err) {
- error_propagate(errp, local_err);
- return;
- }
-}
-
-static void pnv_phb4_root_port_class_init(ObjectClass *klass, void *data)
-{
- DeviceClass *dc = DEVICE_CLASS(klass);
- PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
- PCIERootPortClass *rpc = PCIE_ROOT_PORT_CLASS(klass);
-
- dc->desc = "IBM PHB4 PCIE Root Port";
- dc->user_creatable = true;
-
- device_class_set_parent_realize(dc, pnv_phb4_root_port_realize,
- &rpc->parent_realize);
- device_class_set_parent_reset(dc, pnv_phb4_root_port_reset,
- &rpc->parent_reset);
-
- k->vendor_id = PCI_VENDOR_ID_IBM;
- k->device_id = PNV_PHB4_DEVICE_ID;
- k->revision = 0;
-
- rpc->exp_offset = 0x48;
- rpc->aer_offset = 0x100;
-
- dc->reset = &pnv_phb4_root_port_reset;
-}
-
-static const TypeInfo pnv_phb4_root_port_info = {
- .name = TYPE_PNV_PHB4_ROOT_PORT,
- .parent = TYPE_PCIE_ROOT_PORT,
- .instance_size = sizeof(PnvPHB4RootPort),
- .class_init = pnv_phb4_root_port_class_init,
-};
-
-static void pnv_phb5_root_port_class_init(ObjectClass *klass, void *data)
-{
- DeviceClass *dc = DEVICE_CLASS(klass);
- PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
-
- dc->desc = "IBM PHB5 PCIE Root Port";
- dc->user_creatable = true;
-
- k->vendor_id = PCI_VENDOR_ID_IBM;
- k->device_id = PNV_PHB5_DEVICE_ID;
-}
-
-static const TypeInfo pnv_phb5_root_port_info = {
- .name = TYPE_PNV_PHB5_ROOT_PORT,
- .parent = TYPE_PNV_PHB4_ROOT_PORT,
- .instance_size = sizeof(PnvPHB4RootPort),
- .class_init = pnv_phb5_root_port_class_init,
-};
-
static void pnv_phb4_register_types(void)
{
type_register_static(&pnv_phb4_root_bus_info);
- type_register_static(&pnv_phb5_root_port_info);
- type_register_static(&pnv_phb4_root_port_info);
type_register_static(&pnv_phb4_type_info);
type_register_static(&pnv_phb5_type_info);
type_register_static(&pnv_phb4_iommu_memory_region_info);
diff --git a/hw/pci-host/pnv_phb4_pec.c b/hw/pci-host/pnv_phb4_pec.c
index 0e67f3a338..785b778396 100644
--- a/hw/pci-host/pnv_phb4_pec.c
+++ b/hw/pci-host/pnv_phb4_pec.c
@@ -262,7 +262,7 @@ static void pnv_pec_class_init(ObjectClass *klass, void
*data)
pecc->version = PNV_PHB4_VERSION;
pecc->phb_type = TYPE_PNV_PHB4;
pecc->num_phbs = pnv_pec_num_phbs;
- pecc->rp_model = TYPE_PNV_PHB4_ROOT_PORT;
+ pecc->rp_model = TYPE_PNV_PHB_ROOT_PORT;
}
static const TypeInfo pnv_pec_type_info = {
@@ -315,7 +315,7 @@ static void pnv_phb5_pec_class_init(ObjectClass *klass,
void *data)
pecc->version = PNV_PHB5_VERSION;
pecc->phb_type = TYPE_PNV_PHB5;
pecc->num_phbs = pnv_phb5_pec_num_stacks;
- pecc->rp_model = TYPE_PNV_PHB5_ROOT_PORT;
+ pecc->rp_model = TYPE_PNV_PHB_ROOT_PORT;
}
static const TypeInfo pnv_phb5_pec_type_info = {
diff --git a/include/hw/pci-host/pnv_phb4.h b/include/hw/pci-host/pnv_phb4.h
index f22253358f..29c49ac79c 100644
--- a/include/hw/pci-host/pnv_phb4.h
+++ b/include/hw/pci-host/pnv_phb4.h
@@ -45,16 +45,7 @@ typedef struct PnvPhb4DMASpace {
QLIST_ENTRY(PnvPhb4DMASpace) list;
} PnvPhb4DMASpace;
-/*
- * PHB4 PCIe Root port
- */
#define TYPE_PNV_PHB4_ROOT_BUS "pnv-phb4-root"
-#define TYPE_PNV_PHB4_ROOT_PORT "pnv-phb4-root-port"
-#define TYPE_PNV_PHB5_ROOT_PORT "pnv-phb5-root-port"
-
-typedef struct PnvPHB4RootPort {
- PCIESlot parent_obj;
-} PnvPHB4RootPort;
/*
* PHB4 PCIe Host Bridge for PowerNV machines (POWER9)
--
2.36.1
- [PATCH v2 03/16] ppc/pnv: add PnvPHB base/proxy device, (continued)
- [PATCH v2 03/16] ppc/pnv: add PnvPHB base/proxy device, Daniel Henrique Barboza, 2022/05/31
- [PATCH v2 04/16] ppc/pnv: change PnvPHB3 to be a PnvPHB backend, Daniel Henrique Barboza, 2022/05/31
- [PATCH v2 05/16] ppc/pnv: user created pnv-phb for powernv8, Daniel Henrique Barboza, 2022/05/31
- [PATCH v2 06/16] ppc/pnv: add PHB4 bus init helper, Daniel Henrique Barboza, 2022/05/31
- [PATCH v2 07/16] ppc/pnv: change PnvPHB4 to be a PnvPHB backend, Daniel Henrique Barboza, 2022/05/31
- [PATCH v2 08/16] ppc/pnv: user created pnv-phb for powernv9, Daniel Henrique Barboza, 2022/05/31
- [PATCH v2 09/16] ppc/pnv: change pnv_phb4_get_pec() to also retrieve chip10->pecs, Daniel Henrique Barboza, 2022/05/31
- [PATCH v2 10/16] ppc/pnv: user creatable pnv-phb for powernv10, Daniel Henrique Barboza, 2022/05/31
- [PATCH v2 11/16] ppc/pnv: add pnv-phb-root-port device, Daniel Henrique Barboza, 2022/05/31
- [PATCH v2 12/16] ppc/pnv: remove pnv-phb3-root-port, Daniel Henrique Barboza, 2022/05/31
- [PATCH v2 13/16] ppc/pnv: remove pnv-phb4-root-port,
Daniel Henrique Barboza <=
- [PATCH v2 14/16] ppc/pnv: remove 'phb_rootport_typename' in pnv_phb_realize(), Daniel Henrique Barboza, 2022/05/31
- [PATCH v2 15/16] ppc/pnv: remove pecc->rp_model, Daniel Henrique Barboza, 2022/05/31
- [PATCH v2 16/16] ppc/pnv: remove PnvPHB4.version, Daniel Henrique Barboza, 2022/05/31