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[PULL 07/29] pnv/xive2: Quiet down some error messages
From: |
Daniel Henrique Barboza |
Subject: |
[PULL 07/29] pnv/xive2: Quiet down some error messages |
Date: |
Sat, 10 Jun 2023 10:31:10 -0300 |
From: Frederic Barrat <fbarrat@linux.ibm.com>
When dumping the END and NVP tables ("info pic" from the HMP) on the
P10 model, we're likely to be flooded with error messages such as:
XIVE[0] - VST: invalid NVPT entry f33800 !?
The error is printed when finding an empty VSD in an indirect
table (thus END and NVP tables with skiboot), which is going to happen
when dumping the xive state. So let's tune down those messages. They
can be re-enabled easily with a macro if needed.
Those errors were already hidden on xive/P9, for the same reason.
Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20230531150537.369350-1-fbarrat@linux.ibm.com>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
---
hw/intc/pnv_xive2.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/hw/intc/pnv_xive2.c b/hw/intc/pnv_xive2.c
index e5a028c1e6..ec1edeb385 100644
--- a/hw/intc/pnv_xive2.c
+++ b/hw/intc/pnv_xive2.c
@@ -163,7 +163,9 @@ static uint64_t pnv_xive2_vst_addr_indirect(PnvXive2 *xive,
uint32_t type,
ldq_be_dma(&address_space_memory, vsd_addr, &vsd, MEMTXATTRS_UNSPECIFIED);
if (!(vsd & VSD_ADDRESS_MASK)) {
+#ifdef XIVE2_DEBUG
xive2_error(xive, "VST: invalid %s entry %x !?", info->name, idx);
+#endif
return 0;
}
@@ -185,7 +187,9 @@ static uint64_t pnv_xive2_vst_addr_indirect(PnvXive2 *xive,
uint32_t type,
MEMTXATTRS_UNSPECIFIED);
if (!(vsd & VSD_ADDRESS_MASK)) {
+#ifdef XIVE2_DEBUG
xive2_error(xive, "VST: invalid %s entry %x !?", info->name, idx);
+#endif
return 0;
}
--
2.40.1
- [PULL 04/29] pnv/xive2: Introduce macros to manipulate TIMA addresses, (continued)
- [PULL 04/29] pnv/xive2: Introduce macros to manipulate TIMA addresses, Daniel Henrique Barboza, 2023/06/10
- [PULL 05/29] pnv/xive2: Handle TIMA access through all ports, Daniel Henrique Barboza, 2023/06/10
- Re: [PULL 05/29] pnv/xive2: Handle TIMA access through all ports, Peter Maydell, 2023/06/20
- Re: [PULL 05/29] pnv/xive2: Handle TIMA access through all ports, Cédric Le Goater, 2023/06/20
- Re: [PULL 05/29] pnv/xive2: Handle TIMA access through all ports, Frederic Barrat, 2023/06/20
- Re: [PULL 05/29] pnv/xive2: Handle TIMA access through all ports, Cédric Le Goater, 2023/06/20
- Re: [PULL 05/29] pnv/xive2: Handle TIMA access through all ports, Cédric Le Goater, 2023/06/21
- Re: [PULL 05/29] pnv/xive2: Handle TIMA access through all ports, Frederic Barrat, 2023/06/21
- Re: [PULL 05/29] pnv/xive2: Handle TIMA access through all ports, Cédric Le Goater, 2023/06/21
[PULL 06/29] target/ppc: Fix nested-hv HEAI delivery, Daniel Henrique Barboza, 2023/06/10
[PULL 07/29] pnv/xive2: Quiet down some error messages,
Daniel Henrique Barboza <=
[PULL 08/29] target/ppc: Fix PMU hflags calculation, Daniel Henrique Barboza, 2023/06/10
[PULL 09/29] target/ppc: PMU do not clear MMCR0[FCECE] on performance monitor alert, Daniel Henrique Barboza, 2023/06/10
[PULL 10/29] target/ppc: Fix msgclrp interrupt type, Daniel Henrique Barboza, 2023/06/10
[PULL 11/29] target/ppc: Support directed privileged doorbell interrupt (SDOOR), Daniel Henrique Barboza, 2023/06/10
[PULL 12/29] target/ppc: PMU implement PERFM interrupts, Daniel Henrique Barboza, 2023/06/10
[PULL 14/29] target/ppc: Remove "ext" parameter of ppcemb_tlb_check(), Daniel Henrique Barboza, 2023/06/10
[PULL 13/29] target/ppc: Remove single use function, Daniel Henrique Barboza, 2023/06/10
[PULL 15/29] target/ppc: Move ppcemb_tlb_search() to mmu_common.c, Daniel Henrique Barboza, 2023/06/10
[PULL 16/29] target/ppc: Remove some unneded line breaks, Daniel Henrique Barboza, 2023/06/10
[PULL 17/29] target/ppc: Simplify ppcemb_tlb_search(), Daniel Henrique Barboza, 2023/06/10