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[PATCH 5/6] target/i386/hvf: Use x86_cpu in simulate_[rdmsr|wrmsr]()
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From: |
Philippe Mathieu-Daudé |
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Subject: |
[PATCH 5/6] target/i386/hvf: Use x86_cpu in simulate_[rdmsr|wrmsr]() |
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Date: |
Mon, 9 Oct 2023 13:02:38 +0200 |
We already have 'x86_cpu = X86_CPU(cpu)'. Use the variable
instead of doing another QOM cast with X86_CPU().
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
target/i386/hvf/x86_emu.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/i386/hvf/x86_emu.c b/target/i386/hvf/x86_emu.c
index ccda568478..af1f205ecf 100644
--- a/target/i386/hvf/x86_emu.c
+++ b/target/i386/hvf/x86_emu.c
@@ -676,7 +676,7 @@ void simulate_rdmsr(struct CPUState *cpu)
val = rdtscp() + rvmcs(cpu->accel->fd, VMCS_TSC_OFFSET);
break;
case MSR_IA32_APICBASE:
- val = cpu_get_apic_base(X86_CPU(cpu)->apic_state);
+ val = cpu_get_apic_base(x86_cpu->apic_state);
break;
case MSR_IA32_UCODE_REV:
val = x86_cpu->ucode_rev;
@@ -776,7 +776,7 @@ void simulate_wrmsr(struct CPUState *cpu)
case MSR_IA32_TSC:
break;
case MSR_IA32_APICBASE:
- cpu_set_apic_base(X86_CPU(cpu)->apic_state, data);
+ cpu_set_apic_base(x86_cpu->apic_state, data);
break;
case MSR_FSBASE:
wvmcs(cpu->accel->fd, VMCS_GUEST_FS_BASE, data);
--
2.41.0
- Re: [PATCH 1/6] target/ppc: Use env_archcpu() in helper_book3s_msgsndp(), (continued)
- [PATCH 2/6] target/riscv: Use env_archcpu() in [check_]nanbox(), Philippe Mathieu-Daudé, 2023/10/09
- [PATCH 4/6] target/xtensa: Use env_archcpu() in update_c[compare|count](), Philippe Mathieu-Daudé, 2023/10/09
- [PATCH 3/6] target/s390x: Use env_archcpu() in handle_diag_308(), Philippe Mathieu-Daudé, 2023/10/09
- [PATCH 5/6] target/i386/hvf: Use x86_cpu in simulate_[rdmsr|wrmsr](),
Philippe Mathieu-Daudé <=
- [PATCH 6/6] target/i386: Use env_archcpu() in simulate_[rdmsr/wrmsr](), Philippe Mathieu-Daudé, 2023/10/09
- Re: [PATCH 0/6] target: Use env_archcpu() instead of ARCH_CPU(env_cpu(env)), Philippe Mathieu-Daudé, 2023/10/20