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[PULL 18/46] hw/sparc64/ebus: Access memory regions via pci_address_spac
From: |
Philippe Mathieu-Daudé |
Subject: |
[PULL 18/46] hw/sparc64/ebus: Access memory regions via pci_address_space_io() |
Date: |
Thu, 19 Oct 2023 23:17:43 +0200 |
PCI functions are plugged on a PCI bus. They can only access
external memory regions via the bus.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Message-Id: <20231011185954.10337-5-philmd@linaro.org>
---
hw/sparc64/sun4u.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/hw/sparc64/sun4u.c b/hw/sparc64/sun4u.c
index d908a38f73..c871170378 100644
--- a/hw/sparc64/sun4u.c
+++ b/hw/sparc64/sun4u.c
@@ -360,11 +360,11 @@ static void ebus_realize(PCIDevice *pci_dev, Error **errp)
pci_dev->config[0x09] = 0x00; // programming i/f
pci_dev->config[0x0D] = 0x0a; // latency_timer
- memory_region_init_alias(&s->bar0, OBJECT(s), "bar0", get_system_io(),
- 0, 0x1000000);
+ memory_region_init_alias(&s->bar0, OBJECT(s), "bar0",
+ pci_address_space_io(pci_dev), 0, 0x1000000);
pci_register_bar(pci_dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->bar0);
- memory_region_init_alias(&s->bar1, OBJECT(s), "bar1", get_system_io(),
- 0, 0x8000);
+ memory_region_init_alias(&s->bar1, OBJECT(s), "bar1",
+ pci_address_space_io(pci_dev), 0, 0x8000);
pci_register_bar(pci_dev, 1, PCI_BASE_ADDRESS_SPACE_IO, &s->bar1);
}
--
2.41.0
- [PULL 08/46] memory: drop needless argument, (continued)
- [PULL 08/46] memory: drop needless argument, Philippe Mathieu-Daudé, 2023/10/19
- [PULL 09/46] memory: follow Error API guidelines, Philippe Mathieu-Daudé, 2023/10/19
- [PULL 10/46] hw/sd/sdhci: Block Size Register bits [14:12] is lost, Philippe Mathieu-Daudé, 2023/10/19
- [PULL 11/46] hw/mips/malta: Use sdram_type enum from 'hw/i2c/smbus_eeprom.h', Philippe Mathieu-Daudé, 2023/10/19
- [PULL 12/46] hw/mips: Merge 'hw/mips/cpudevs.h' with 'target/mips/cpu.h', Philippe Mathieu-Daudé, 2023/10/19
- [PULL 13/46] hw/misc/mips_itu: Declare itc_reconfigure() in 'hw/misc/mips_itu.h', Philippe Mathieu-Daudé, 2023/10/19
- [PULL 14/46] hw/misc/mips_itu: Make MIPSITUState target agnostic, Philippe Mathieu-Daudé, 2023/10/19
- [PULL 15/46] hw/pci-host/sh_pcic: Declare CPU QOM types using DEFINE_TYPES() macro, Philippe Mathieu-Daudé, 2023/10/19
- [PULL 16/46] hw/pci-host/sh_pcic: Correct PCI host / devfn#0 function names, Philippe Mathieu-Daudé, 2023/10/19
- [PULL 17/46] hw/pci-host/sh_pcic: Replace magic value by proper definition, Philippe Mathieu-Daudé, 2023/10/19
- [PULL 18/46] hw/sparc64/ebus: Access memory regions via pci_address_space_io(),
Philippe Mathieu-Daudé <=
- [PULL 19/46] hw/acpi/pcihp: Clean up global variable shadowing in acpi_pcihp_init(), Philippe Mathieu-Daudé, 2023/10/19
- [PULL 20/46] hw/pci: Clean up global variable shadowing of address_space_io variable, Philippe Mathieu-Daudé, 2023/10/19
- [PULL 21/46] hw/s390x: Clean up global variable shadowing in quiesce_powerdown_req(), Philippe Mathieu-Daudé, 2023/10/19
- [PULL 22/46] hw/intc/apic: Use ERRP_GUARD() in apic_common_realize(), Philippe Mathieu-Daudé, 2023/10/19
- [PULL 23/46] hw/ppc/spapr_vio: Realize SPAPR_VIO_BRIDGE device before accessing it, Philippe Mathieu-Daudé, 2023/10/19
- [PULL 24/46] hw/ppc/pnv_xscom: Rename pnv_xscom_realize(Error **) -> pnv_xscom_init(), Philippe Mathieu-Daudé, 2023/10/19
- [PULL 25/46] hw/ppc/pnv_xscom: Move sysbus_mmio_map() call within pnv_xscom_init(), Philippe Mathieu-Daudé, 2023/10/19
- [PULL 26/46] hw/ppc/pnv_xscom: Do not use SysBus API to map local MMIO region, Philippe Mathieu-Daudé, 2023/10/19
- [PULL 27/46] hw/ppc/pnv: Do not use SysBus API to map local MMIO region, Philippe Mathieu-Daudé, 2023/10/19
- [PULL 28/46] hw/intc/spapr_xive: Move sysbus_init_mmio() calls around, Philippe Mathieu-Daudé, 2023/10/19