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[PATCH 0/2] ppc/pnv: ADU model for POWER9/10
From: |
Nicholas Piggin |
Subject: |
[PATCH 0/2] ppc/pnv: ADU model for POWER9/10 |
Date: |
Wed, 17 Apr 2024 21:02:11 +1000 |
These patches adds the framework for a proper ADU model rather than
putting registers into the xscom default ops, and implements ADU's
indirect LPC access functionality which IBM's proprietary firmware
uses to provide consoles on UARTs.
Patch 1 should be quite a simple hooking up the xscom address space.
Patch 2 implements one of the memory access functions of the ADU that
drives access to LPC address space from XSCOM register operations which
is non-trivial but there are similar examples already in tree.
Thanks,
Nick
Nicholas Piggin (2):
ppc/pnv: Begin a more complete ADU LPC model for POWER9/10
ppc/pnv: Implement ADU access to LPC space
include/hw/ppc/pnv_adu.h | 41 ++++++++
include/hw/ppc/pnv_chip.h | 3 +
include/hw/ppc/pnv_lpc.h | 5 +
include/hw/ppc/pnv_xscom.h | 6 ++
hw/ppc/pnv.c | 20 ++++
hw/ppc/pnv_adu.c | 202 +++++++++++++++++++++++++++++++++++++
hw/ppc/pnv_lpc.c | 12 +--
hw/ppc/pnv_xscom.c | 9 --
hw/ppc/meson.build | 1 +
hw/ppc/trace-events | 4 +
10 files changed, 288 insertions(+), 15 deletions(-)
create mode 100644 include/hw/ppc/pnv_adu.h
create mode 100644 hw/ppc/pnv_adu.c
--
2.43.0
- [PATCH 0/2] ppc/pnv: ADU model for POWER9/10,
Nicholas Piggin <=