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[PATCH v3 09/26] hw/ppc/ppce500_ccsr: Trace access to CCSR region
From: |
Bernhard Beschow |
Subject: |
[PATCH v3 09/26] hw/ppc/ppce500_ccsr: Trace access to CCSR region |
Date: |
Sat, 2 Nov 2024 14:16:58 +0100 |
The CCSR space is just a container which is meant to be covered by platform
device memory regions. However, QEMU only implements a subset of these devices.
Add some tracing to see which unimplemented devices a guest attempts to access.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
---
hw/ppc/ppce500_ccsr.c | 25 ++++++++++++++++++++++++-
hw/ppc/trace-events | 3 +++
2 files changed, 27 insertions(+), 1 deletion(-)
diff --git a/hw/ppc/ppce500_ccsr.c b/hw/ppc/ppce500_ccsr.c
index 5d0e1e0e89..dfd8e80c2d 100644
--- a/hw/ppc/ppce500_ccsr.c
+++ b/hw/ppc/ppce500_ccsr.c
@@ -13,12 +13,35 @@
#include "qemu/osdep.h"
#include "ppce500_ccsr.h"
+#include "trace.h"
+
+static uint64_t ppce500_ccsr_io_read(void *opaque, hwaddr addr, unsigned size)
+{
+ uint64_t value = 0;
+
+ trace_ppce500_ccsr_io_read(addr, value, size);
+
+ return value;
+}
+
+static void ppce500_ccsr_io_write(void *opaque, hwaddr addr, uint64_t value,
+ unsigned size)
+{
+ trace_ppce500_ccsr_io_write(addr, value, size);
+}
+
+static const MemoryRegionOps ppce500_ccsr_ops = {
+ .read = ppce500_ccsr_io_read,
+ .write = ppce500_ccsr_io_write,
+ .endianness = DEVICE_NATIVE_ENDIAN,
+};
static void ppce500_ccsr_init(Object *obj)
{
PPCE500CCSRState *s = CCSR(obj);
- memory_region_init(&s->ccsr_space, obj, "e500-ccsr", MPC85XX_CCSRBAR_SIZE);
+ memory_region_init_io(&s->ccsr_space, obj, &ppce500_ccsr_ops, obj,
+ "e500-ccsr", MPC85XX_CCSRBAR_SIZE);
sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->ccsr_space);
}
diff --git a/hw/ppc/trace-events b/hw/ppc/trace-events
index 1f125ce841..ca4c231c9f 100644
--- a/hw/ppc/trace-events
+++ b/hw/ppc/trace-events
@@ -143,6 +143,9 @@ ppc_irq_cpu(const char *action) "%s"
ppc_dcr_read(uint32_t addr, uint32_t val) "DRCN[0x%x] -> 0x%x"
ppc_dcr_write(uint32_t addr, uint32_t val) "DRCN[0x%x] <- 0x%x"
+ppce500_ccsr_io_read(uint32_t index, uint32_t val, uint8_t size) "[0x%" PRIx32
"] -> 0x%08x (size: 0x%" PRIu8 ")"
+ppce500_ccsr_io_write(uint32_t index, uint32_t val, uint8_t size) "[0x%"
PRIx32 "] <- 0x%08x (size: 0x%" PRIu8 ")"
+
# prep_systemio.c
prep_systemio_read(uint32_t addr, uint32_t val) "read addr=0x%x val=0x%x"
prep_systemio_write(uint32_t addr, uint32_t val) "write addr=0x%x val=0x%x"
--
2.47.0
- [PATCH v3 19/26] hw/intc: Guard openpic_kvm.c by dedicated OPENPIC_KVM Kconfig switch, (continued)
[PATCH v3 21/26] hw/block/pflash_cfi01: Prefer DEFINE_TYPES() macro, Bernhard Beschow, 2024/11/02
[PATCH v3 01/26] hw/ppc/e500: Do not leak struct boot_info, Bernhard Beschow, 2024/11/02
[PATCH v3 23/26] hw/rtc/ds1338: Prefer DEFINE_TYPES() macro, Bernhard Beschow, 2024/11/02
[PATCH v3 02/26] hw/ppc/e500: Remove firstenv variable, Bernhard Beschow, 2024/11/02
[PATCH v3 09/26] hw/ppc/ppce500_ccsr: Trace access to CCSR region,
Bernhard Beschow <=
[PATCH v3 08/26] hw/ppc/e500: Extract ppce500_ccsr.c, Bernhard Beschow, 2024/11/02
[PATCH v3 26/26] MAINTAINERS: Add hw/gpio/gpio_pwr.c, Bernhard Beschow, 2024/11/02
[PATCH v3 04/26] hw/ppc/e500: Remove unused "irqs" parameter, Bernhard Beschow, 2024/11/02
[PATCH v3 05/26] hw/ppc/e500: Add missing device tree properties to i2c controller node, Bernhard Beschow, 2024/11/02
[PATCH v3 03/26] hw/ppc/e500: Prefer QOM cast, Bernhard Beschow, 2024/11/02
[PATCH v3 11/26] hw/i2c/mpc_i2c: Convert DPRINTF to trace events for register access, Bernhard Beschow, 2024/11/02
[PATCH v3 16/26] hw/net/fsl_etsec/etsec: Prefer DEFINE_TYPES() macro, Bernhard Beschow, 2024/11/02