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[PATCH v2 02/16] hw/microblaze: Propagate CPU endianness to microblaze_l
From: |
Philippe Mathieu-Daudé |
Subject: |
[PATCH v2 02/16] hw/microblaze: Propagate CPU endianness to microblaze_load_kernel() |
Date: |
Thu, 7 Nov 2024 01:22:08 +0000 |
Pass vCPU endianness as argument so we can load kernels
with different endianness (different from the qemu-system-binary
builtin one).
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Anton Johansson <anjo@rev.ng>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com>
Message-Id: <20241105130431.22564-9-philmd@linaro.org>
---
hw/microblaze/boot.h | 4 ++--
hw/microblaze/boot.c | 8 ++++----
hw/microblaze/petalogix_ml605_mmu.c | 2 +-
hw/microblaze/petalogix_s3adsp1800_mmu.c | 2 +-
hw/microblaze/xlnx-zynqmp-pmu.c | 2 +-
5 files changed, 9 insertions(+), 9 deletions(-)
diff --git a/hw/microblaze/boot.h b/hw/microblaze/boot.h
index 5a8c2f7975..d179a551a6 100644
--- a/hw/microblaze/boot.h
+++ b/hw/microblaze/boot.h
@@ -2,8 +2,8 @@
#define MICROBLAZE_BOOT_H
-void microblaze_load_kernel(MicroBlazeCPU *cpu, hwaddr ddr_base,
- uint32_t ramsize,
+void microblaze_load_kernel(MicroBlazeCPU *cpu, bool is_little_endian,
+ hwaddr ddr_base, uint32_t ramsize,
const char *initrd_filename,
const char *dtb_filename,
void (*machine_cpu_reset)(MicroBlazeCPU *));
diff --git a/hw/microblaze/boot.c b/hw/microblaze/boot.c
index ed61e483ee..3675489fa5 100644
--- a/hw/microblaze/boot.c
+++ b/hw/microblaze/boot.c
@@ -114,8 +114,8 @@ static uint64_t translate_kernel_address(void *opaque,
uint64_t addr)
return addr - 0x30000000LL;
}
-void microblaze_load_kernel(MicroBlazeCPU *cpu, hwaddr ddr_base,
- uint32_t ramsize,
+void microblaze_load_kernel(MicroBlazeCPU *cpu, bool is_little_endian,
+ hwaddr ddr_base, uint32_t ramsize,
const char *initrd_filename,
const char *dtb_filename,
void (*machine_cpu_reset)(MicroBlazeCPU *))
@@ -144,13 +144,13 @@ void microblaze_load_kernel(MicroBlazeCPU *cpu, hwaddr
ddr_base,
/* Boots a kernel elf binary. */
kernel_size = load_elf(kernel_filename, NULL, NULL, NULL,
&entry, NULL, &high, NULL,
- TARGET_BIG_ENDIAN, EM_MICROBLAZE, 0, 0);
+ !is_little_endian, EM_MICROBLAZE, 0, 0);
base32 = entry;
if (base32 == 0xc0000000) {
kernel_size = load_elf(kernel_filename, NULL,
translate_kernel_address, NULL,
&entry, NULL, NULL, NULL,
- TARGET_BIG_ENDIAN, EM_MICROBLAZE, 0, 0);
+ !is_little_endian, EM_MICROBLAZE, 0, 0);
}
/* Always boot into physical ram. */
boot_info.bootstrap_pc = (uint32_t)entry;
diff --git a/hw/microblaze/petalogix_ml605_mmu.c
b/hw/microblaze/petalogix_ml605_mmu.c
index 61e47d8398..d2b2109065 100644
--- a/hw/microblaze/petalogix_ml605_mmu.c
+++ b/hw/microblaze/petalogix_ml605_mmu.c
@@ -204,7 +204,7 @@ petalogix_ml605_init(MachineState *machine)
cpu->cfg.pvr_regs[5] = 0xc56be000;
cpu->cfg.pvr_regs[10] = 0x0e000000; /* virtex 6 */
- microblaze_load_kernel(cpu, MEMORY_BASEADDR, ram_size,
+ microblaze_load_kernel(cpu, true, MEMORY_BASEADDR, ram_size,
machine->initrd_filename,
BINARY_DEVICE_TREE_FILE,
NULL);
diff --git a/hw/microblaze/petalogix_s3adsp1800_mmu.c
b/hw/microblaze/petalogix_s3adsp1800_mmu.c
index 6c0f5c6c65..8110be8371 100644
--- a/hw/microblaze/petalogix_s3adsp1800_mmu.c
+++ b/hw/microblaze/petalogix_s3adsp1800_mmu.c
@@ -129,7 +129,7 @@ petalogix_s3adsp1800_init(MachineState *machine)
create_unimplemented_device("xps_gpio", GPIO_BASEADDR, 0x10000);
- microblaze_load_kernel(cpu, ddr_base, ram_size,
+ microblaze_load_kernel(cpu, !TARGET_BIG_ENDIAN, ddr_base, ram_size,
machine->initrd_filename,
BINARY_DEVICE_TREE_FILE,
NULL);
diff --git a/hw/microblaze/xlnx-zynqmp-pmu.c b/hw/microblaze/xlnx-zynqmp-pmu.c
index 567aad47bf..bdbf7328bf 100644
--- a/hw/microblaze/xlnx-zynqmp-pmu.c
+++ b/hw/microblaze/xlnx-zynqmp-pmu.c
@@ -172,7 +172,7 @@ static void xlnx_zynqmp_pmu_init(MachineState *machine)
qdev_realize(DEVICE(pmu), NULL, &error_fatal);
/* Load the kernel */
- microblaze_load_kernel(&pmu->cpu, XLNX_ZYNQMP_PMU_RAM_ADDR,
+ microblaze_load_kernel(&pmu->cpu, true, XLNX_ZYNQMP_PMU_RAM_ADDR,
machine->ram_size,
machine->initrd_filename,
machine->dtb,
--
2.45.2
- [PATCH v2 00/16] hw/microblaze: Allow running cross-endian vCPUs, Philippe Mathieu-Daudé, 2024/11/06
- [PATCH v2 01/16] hw/microblaze: Restrict MemoryRegionOps are implemented as 32-bit, Philippe Mathieu-Daudé, 2024/11/06
- [PATCH v2 02/16] hw/microblaze: Propagate CPU endianness to microblaze_load_kernel(),
Philippe Mathieu-Daudé <=
- [PATCH v2 03/16] hw/intc/xilinx_intc: Make device endianness configurable, Philippe Mathieu-Daudé, 2024/11/06
- [RFC PATCH v2 04/16] hw/net/xilinx_ethlite: Simplify by having configurable endianness, Philippe Mathieu-Daudé, 2024/11/06
- [RFC PATCH v2 05/16] hw/timer/xilinx_timer: Allow down to 8-bit memory access, Philippe Mathieu-Daudé, 2024/11/06
- [PATCH v2 06/16] hw/timer/xilinx_timer: Make device endianness configurable, Philippe Mathieu-Daudé, 2024/11/06
- [PATCH v2 07/16] hw/char/xilinx_uartlite: Make device endianness configurable, Philippe Mathieu-Daudé, 2024/11/06
- [PATCH v2 08/16] hw/ssi/xilinx_spi: Make device endianness configurable, Philippe Mathieu-Daudé, 2024/11/06