чт, 20 мар. 2025 г., 23:41 BALATON Zoltan <balaton@eik.bme.hu>:
On Thu, 20 Mar 2025, Andrew Randrianasulu wrote:
Will look at ATA situation, some said SATA was more likely to work on
real
machines.
I think we've tested that too at some point. There's -device sii3112 that
I've added for sam460ex and AmigaOS but this is a common chip also found
on some Mac compatible SATA cards. You just need the FCode ROM from one of
those, which were available in updates to these cards. There was one from
SeriTek and one from WiebeSATA3112 and I think at least one of those
worked with my patches to OpenBIOS to run the ROM so it should work with
real OpenFirmware too. Although that can be a workaround, it would still
be interesting to know why the on board IDE does not work. Maybe it
emulates the IDE found on the G4 but the G3 had something different? There
were names like Keylargo and O'Hare but I don't remember what these were
exactly.
according to dppc files ...
https://github.com/dingusdev/dingusppc/blob/master/devices/ioctrl/heathrow.cpp
https://github.com/dingusdev/dingusppc/blob/master/devices/ioctrl/macio.h
Heathrow , O'hare, GrandCentral all revisions of macio chip ....
/** PCI device IDs for various MacIO ASICs. */
enum {
MIO_DEV_ID_GRANDCENTRAL = 0x0002,
MIO_DEV_ID_OHARE = 0x0007,
MIO_DEV_ID_HEATHROW = 0x0010,
MIO_DEV_ID_PADDINGTON = 0x0017,
};
but what worties me most - Dppc's emulation of
device_write/device_read/dma_read/dma_write seems to be much more complex
than qemu's (living in hw/intc and hw/misc/macio)
And there is whole comment about ide1 being mediabay (so you can put floppy
there ...)
uint8_t cpu_id = 0xE0; // CPUID field (LSB of the MIO_HEAT_ID)
uint8_t mb_id = 0x70; // Media Bay ID (bits 15:8 of the MIO_HEAT_ID)
uint8_t mon_id = 0x10; // Monitor ID (bits 23:16 of the MIO_HEAT_ID)
uint8_t fp_id = 0x70; // Flat panel ID (MSB of the MIO_HEAT_ID)
uint8_t emmo_pin; // factory tester status, active low
// subdevice objects
MacioSndCodec* snd_codec; // audio codec instance
NVram* nvram; // NVRAM
ViaCuda* viacuda; // VIA cell with Cuda MCU attached to it
MeshController* mesh; // MESH SCSI cell instance
EsccController* escc; // ESCC serial controller
IdeChannel* ide_0; // Internal ATA
IdeChannel* ide_1; // Media Bay ATA
======
of course dppc is modern (c++20?) c++ so some of this might be
architecture difference between emulators, but I am afraid it might be more
complex than just wrong dma channel or address ....