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[Qemu-riscv] [PATCH v8 0/4] Connect a PCIe host and graphics support to
From: |
Alistair Francis |
Subject: |
[Qemu-riscv] [PATCH v8 0/4] Connect a PCIe host and graphics support to RISC-V |
Date: |
Tue, 11 Dec 2018 22:37:07 +0000 |
This series is now ready to be merged, all of the patches are reviewed
and tested.
Palmer can you take this with all the other RISC-V patches sent during
the freeze?
V8:
- Drop SiFive U support
- Drop legacy -nic support
- Small other review changes
V7:
- Fix the GPEX memory mapping thanks to Bin Meng
- Fix the interrupt mapping thanks to Logan Gunthorpe
V6:
- Fix the interrupt issue for the GPEX device
V5:
- Rebase
- Include pci.mak in the default configs
V4:
- Fix the spike device tree
- Don't use stdvga device
V3:
- Remove Makefile config changes
- Connect a network adapter to the virt device
V2:
- Use the gpex PCIe host for virt
- Add support for SiFive U PCIe
Alistair Francis (4):
hw/riscv/virt: Increase the number of interrupts
hw/riscv/virt: Adjust memory layout spacing
hw/riscv/virt: Connect the gpex PCIe
riscv: Enable VGA and PCIE_VGA
default-configs/riscv32-softmmu.mak | 8 +-
default-configs/riscv64-softmmu.mak | 8 +-
hw/riscv/virt.c | 147 ++++++++++++++++++++++++++--
include/hw/riscv/virt.h | 15 ++-
4 files changed, 165 insertions(+), 13 deletions(-)
--
2.19.1
- [Qemu-riscv] [PATCH v8 0/4] Connect a PCIe host and graphics support to RISC-V,
Alistair Francis <=
- [Qemu-riscv] [PATCH v8 1/4] hw/riscv/virt: Increase the number of interrupts, Alistair Francis, 2018/12/11
- [Qemu-riscv] [PATCH v8 2/4] hw/riscv/virt: Adjust memory layout spacing, Alistair Francis, 2018/12/11
- [Qemu-riscv] [PATCH v8 3/4] hw/riscv/virt: Connect the gpex PCIe, Alistair Francis, 2018/12/11
- [Qemu-riscv] [PATCH v8 4/4] riscv: Enable VGA and PCIE_VGA, Alistair Francis, 2018/12/11
- Re: [Qemu-riscv] [PATCH v8 0/4] Connect a PCIe host and graphics support to RISC-V, Palmer Dabbelt, 2018/12/11