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[PATCH v3 9/9] target/riscv: Use a smaller guess size for no-MMU PMP
From: |
Alistair Francis |
Subject: |
[PATCH v3 9/9] target/riscv: Use a smaller guess size for no-MMU PMP |
Date: |
Tue, 19 May 2020 14:31:50 -0700 |
Signed-off-by: Alistair Francis <address@hidden>
---
target/riscv/pmp.c | 14 +++++++++-----
1 file changed, 9 insertions(+), 5 deletions(-)
diff --git a/target/riscv/pmp.c b/target/riscv/pmp.c
index 0e6b640fbd..607a991260 100644
--- a/target/riscv/pmp.c
+++ b/target/riscv/pmp.c
@@ -233,12 +233,16 @@ bool pmp_hart_has_privs(CPURISCVState *env, target_ulong
addr,
return true;
}
- /*
- * if size is unknown (0), assume that all bytes
- * from addr to the end of the page will be accessed.
- */
if (size == 0) {
- pmp_size = -(addr | TARGET_PAGE_MASK);
+ if (!riscv_feature(env, RISCV_FEATURE_MMU)) {
+ /*
+ * If size is unknown (0), assume that all bytes
+ * from addr to the end of the page will be accessed.
+ */
+ pmp_size = -(addr | TARGET_PAGE_MASK);
+ } else {
+ pmp_size = sizeof(target_ulong);
+ }
} else {
pmp_size = size;
}
--
2.26.2
- [PATCH v3 3/9] target/riscv: Add the lowRISC Ibex CPU, (continued)
[PATCH v3 4/9] riscv: Initial commit of OpenTitan machine, Alistair Francis, 2020/05/19
[PATCH v3 5/9] hw/char: Initial commit of Ibex UART, Alistair Francis, 2020/05/19
[PATCH v3 6/9] hw/intc: Initial commit of lowRISC Ibex PLIC, Alistair Francis, 2020/05/19
[PATCH v3 7/9] riscv/opentitan: Connect the PLIC device, Alistair Francis, 2020/05/19
[PATCH v3 9/9] target/riscv: Use a smaller guess size for no-MMU PMP,
Alistair Francis <=
[PATCH v3 8/9] riscv/opentitan: Connect the UART device, Alistair Francis, 2020/05/19