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[PATCH v1 8/8] target/riscv: Add ePMP support for the Ibex CPU
From: |
Alistair Francis |
Subject: |
[PATCH v1 8/8] target/riscv: Add ePMP support for the Ibex CPU |
Date: |
Fri, 2 Apr 2021 08:48:31 -0400 |
The physical Ibex CPU has ePMP support and it's enabled for the
OpenTitan machine so let's enable ePMP support for the Ibex CPU in QEMU.
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
target/riscv/cpu.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index d665681f90..244066a6fc 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -202,6 +202,7 @@ static void rv32_ibex_cpu_init(Object *obj)
set_misa(env, RV32 | RVI | RVM | RVC | RVU);
set_priv_version(env, PRIV_VERSION_1_10_0);
qdev_prop_set_bit(DEVICE(obj), "mmu", false);
+ qdev_prop_set_bit(DEVICE(obj), "x-epmp", true);
}
static void rv32_imafcu_nommu_cpu_init(Object *obj)
--
2.31.0
- Re: [PATCH v1 1/8] target/riscv: Fix the PMP is locked check when using TOR, (continued)