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Re: [PATCH v1 1/1] MAINTAINERS: Update the RISC-V CPU Maintainers
From: |
Alistair Francis |
Subject: |
Re: [PATCH v1 1/1] MAINTAINERS: Update the RISC-V CPU Maintainers |
Date: |
Wed, 7 Apr 2021 10:23:51 -0400 |
On Tue, Apr 6, 2021 at 6:51 PM Alistair Francis
<alistair.francis@wdc.com> wrote:
>
> Update the RISC-V maintainers by removing Sagar and Bastian who haven't
> been involved recently.
>
> Also add Bin who has been helping with reviews.
>
> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Thanks!
Applied to riscv-to-apply.next
Alistair
> ---
> I have run this by all of the people involved and they are all ok with
> the change.
>
> MAINTAINERS | 5 ++---
> 1 file changed, 2 insertions(+), 3 deletions(-)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 69003cdc3c..541bd264b2 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -295,9 +295,8 @@ F: tests/acceptance/machine_ppc.py
>
> RISC-V TCG CPUs
> M: Palmer Dabbelt <palmer@dabbelt.com>
> -M: Alistair Francis <Alistair.Francis@wdc.com>
> -M: Sagar Karandikar <sagark@eecs.berkeley.edu>
> -M: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
> +M: Alistair Francis <alistair.francis@wdc.com>
> +M: Bin Meng <bin.meng@windriver.com>
> L: qemu-riscv@nongnu.org
> S: Supported
> F: target/riscv/
> --
> 2.31.0
>