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[PATCH v6 07/18] cpu: Rename CPUClass vmsd -> legacy_vmsd
From: |
Philippe Mathieu-Daudé |
Subject: |
[PATCH v6 07/18] cpu: Rename CPUClass vmsd -> legacy_vmsd |
Date: |
Thu, 22 Apr 2021 21:38:51 +0200 |
Quoting Peter Maydell [*]:
There are two ways to handle migration for
a CPU object:
(1) like any other device, so it has a dc->vmsd that covers
migration for the whole object. As usual for objects that are a
subclass of a parent that has state, the first entry in the
VMStateDescription field list is VMSTATE_CPU(), which migrates
the cpu_common fields, followed by whatever the CPU's own migration
fields are.
(2) a backwards-compatible mechanism for CPUs that were
originally migrated using manual "write fields to the migration
stream structures". The on-the-wire migration format
for those is based on the 'env' pointer (which isn't a QOM object),
and the cpu_common part of the migration data is elsewhere.
cpu_exec_realizefn() handles both possibilities:
* for type 1, dc->vmsd is set and cc->vmsd is not,
so cpu_exec_realizefn() does nothing, and the standard
"register dc->vmsd for a device" code does everything needed
* for type 2, dc->vmsd is NULL and so we register the
vmstate_cpu_common directly to handle the cpu-common fields,
and the cc->vmsd to handle the per-CPU stuff
You can't change a CPU from one type to the other without breaking
migration compatibility, which is why some guest architectures
are stuck on the cc->vmsd form. New targets should use dc->vmsd.
To avoid new targets to start using type (2), rename cc->vmsd as
cc->legacy_vmsd. The correct field to implement is dc->vmsd (the
DeviceClass one).
See also commit b170fce3dd0 ("cpu: Register VMStateDescription
through CPUState") for historic background.
[*] https://www.mail-archive.com/qemu-devel@nongnu.org/msg800849.html
Cc: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
include/hw/core/cpu.h | 5 +++--
cpu.c | 12 ++++++------
target/arm/cpu.c | 2 +-
target/avr/cpu.c | 2 +-
target/i386/cpu.c | 2 +-
target/lm32/cpu.c | 2 +-
target/mips/cpu.c | 2 +-
target/moxie/cpu.c | 2 +-
target/riscv/cpu.c | 2 +-
target/s390x/cpu.c | 2 +-
target/sparc/cpu.c | 2 +-
target/ppc/translate_init.c.inc | 2 +-
12 files changed, 19 insertions(+), 18 deletions(-)
diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h
index 08af2c383a5..10dd16531ba 100644
--- a/include/hw/core/cpu.h
+++ b/include/hw/core/cpu.h
@@ -122,7 +122,8 @@ struct AccelCPUClass;
* 32-bit VM coredump.
* @write_elf32_qemunote: Callback for writing a CPU- and QEMU-specific ELF
* note to a 32-bit VM coredump.
- * @vmsd: State description for migration.
+ * @legacy_vmsd: Legacy state description for migration.
+ * Do not use in new targets, use #DeviceClass::vmsd instead.
* @gdb_num_core_regs: Number of core registers accessible to GDB.
* @gdb_core_xml_file: File name for core registers GDB XML description.
* @gdb_stop_before_watchpoint: Indicates whether GDB expects the CPU to stop
@@ -177,7 +178,7 @@ struct CPUClass {
int (*write_elf32_qemunote)(WriteCoreDumpFunction f, CPUState *cpu,
void *opaque);
- const VMStateDescription *vmsd;
+ const VMStateDescription *legacy_vmsd;
const char *gdb_core_xml_file;
gchar * (*gdb_arch_name)(CPUState *cpu);
const char * (*gdb_get_dynamic_xml)(CPUState *cpu, const char *xmlname);
diff --git a/cpu.c b/cpu.c
index 4fed04219df..c1c9cdebc3e 100644
--- a/cpu.c
+++ b/cpu.c
@@ -139,13 +139,13 @@ void cpu_exec_realizefn(CPUState *cpu, Error **errp)
#ifdef CONFIG_USER_ONLY
assert(qdev_get_vmsd(DEVICE(cpu)) == NULL);
- assert(cc->vmsd == NULL);
+ assert(cc->legacy_vmsd == NULL);
#else
if (qdev_get_vmsd(DEVICE(cpu)) == NULL) {
vmstate_register(NULL, cpu->cpu_index, &vmstate_cpu_common, cpu);
}
- if (cc->vmsd != NULL) {
- vmstate_register(NULL, cpu->cpu_index, cc->vmsd, cpu);
+ if (cc->legacy_vmsd != NULL) {
+ vmstate_register(NULL, cpu->cpu_index, cc->legacy_vmsd, cpu);
}
#endif /* CONFIG_USER_ONLY */
}
@@ -155,10 +155,10 @@ void cpu_exec_unrealizefn(CPUState *cpu)
CPUClass *cc = CPU_GET_CLASS(cpu);
#ifdef CONFIG_USER_ONLY
- assert(cc->vmsd == NULL);
+ assert(cc->legacy_vmsd == NULL);
#else
- if (cc->vmsd != NULL) {
- vmstate_unregister(NULL, cc->vmsd, cpu);
+ if (cc->legacy_vmsd != NULL) {
+ vmstate_unregister(NULL, cc->legacy_vmsd, cpu);
}
if (qdev_get_vmsd(DEVICE(cpu)) == NULL) {
vmstate_unregister(NULL, &vmstate_cpu_common, cpu);
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 0dd623e5909..3062e8c702e 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -1982,7 +1982,7 @@ static void arm_cpu_class_init(ObjectClass *oc, void
*data)
#ifndef CONFIG_USER_ONLY
cc->get_phys_page_attrs_debug = arm_cpu_get_phys_page_attrs_debug;
cc->asidx_from_attrs = arm_asidx_from_attrs;
- cc->vmsd = &vmstate_arm_cpu;
+ cc->legacy_vmsd = &vmstate_arm_cpu;
cc->virtio_is_big_endian = arm_cpu_virtio_is_big_endian;
cc->write_elf64_note = arm_cpu_write_elf64_note;
cc->write_elf32_note = arm_cpu_write_elf32_note;
diff --git a/target/avr/cpu.c b/target/avr/cpu.c
index 0f4596932ba..37a8ebcc86f 100644
--- a/target/avr/cpu.c
+++ b/target/avr/cpu.c
@@ -213,7 +213,7 @@ static void avr_cpu_class_init(ObjectClass *oc, void *data)
cc->set_pc = avr_cpu_set_pc;
cc->memory_rw_debug = avr_cpu_memory_rw_debug;
cc->get_phys_page_debug = avr_cpu_get_phys_page_debug;
- cc->vmsd = &vms_avr_cpu;
+ cc->legacy_vmsd = &vms_avr_cpu;
cc->disas_set_info = avr_cpu_disas_set_info;
cc->gdb_read_register = avr_cpu_gdb_read_register;
cc->gdb_write_register = avr_cpu_gdb_write_register;
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index ad99cad0e7c..f85ae518dd4 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -7431,7 +7431,7 @@ static void x86_cpu_common_class_init(ObjectClass *oc,
void *data)
cc->write_elf64_qemunote = x86_cpu_write_elf64_qemunote;
cc->write_elf32_note = x86_cpu_write_elf32_note;
cc->write_elf32_qemunote = x86_cpu_write_elf32_qemunote;
- cc->vmsd = &vmstate_x86_cpu;
+ cc->legacy_vmsd = &vmstate_x86_cpu;
#endif /* !CONFIG_USER_ONLY */
cc->gdb_arch_name = x86_gdb_arch_name;
diff --git a/target/lm32/cpu.c b/target/lm32/cpu.c
index c23d72874c0..c0388142528 100644
--- a/target/lm32/cpu.c
+++ b/target/lm32/cpu.c
@@ -241,7 +241,7 @@ static void lm32_cpu_class_init(ObjectClass *oc, void *data)
cc->gdb_write_register = lm32_cpu_gdb_write_register;
#ifndef CONFIG_USER_ONLY
cc->get_phys_page_debug = lm32_cpu_get_phys_page_debug;
- cc->vmsd = &vmstate_lm32_cpu;
+ cc->legacy_vmsd = &vmstate_lm32_cpu;
#endif
cc->gdb_num_core_regs = 32 + 7;
cc->gdb_stop_before_watchpoint = true;
diff --git a/target/mips/cpu.c b/target/mips/cpu.c
index dce1e166bde..11604954504 100644
--- a/target/mips/cpu.c
+++ b/target/mips/cpu.c
@@ -720,7 +720,7 @@ static void mips_cpu_class_init(ObjectClass *c, void *data)
cc->gdb_write_register = mips_cpu_gdb_write_register;
#ifndef CONFIG_USER_ONLY
cc->get_phys_page_debug = mips_cpu_get_phys_page_debug;
- cc->vmsd = &vmstate_mips_cpu;
+ cc->legacy_vmsd = &vmstate_mips_cpu;
#endif
cc->disas_set_info = mips_cpu_disas_set_info;
cc->gdb_num_core_regs = 73;
diff --git a/target/moxie/cpu.c b/target/moxie/cpu.c
index 83bec34d36c..3c81a088eaa 100644
--- a/target/moxie/cpu.c
+++ b/target/moxie/cpu.c
@@ -122,7 +122,7 @@ static void moxie_cpu_class_init(ObjectClass *oc, void
*data)
cc->set_pc = moxie_cpu_set_pc;
#ifndef CONFIG_USER_ONLY
cc->get_phys_page_debug = moxie_cpu_get_phys_page_debug;
- cc->vmsd = &vmstate_moxie_cpu;
+ cc->legacy_vmsd = &vmstate_moxie_cpu;
#endif
cc->disas_set_info = moxie_cpu_disas_set_info;
cc->tcg_ops = &moxie_tcg_ops;
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index 7d6ed80f6b6..70be7e8287a 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -624,7 +624,7 @@ static void riscv_cpu_class_init(ObjectClass *c, void *data)
#ifndef CONFIG_USER_ONLY
cc->get_phys_page_debug = riscv_cpu_get_phys_page_debug;
/* For now, mark unmigratable: */
- cc->vmsd = &vmstate_riscv_cpu;
+ cc->legacy_vmsd = &vmstate_riscv_cpu;
cc->write_elf64_note = riscv_cpu_write_elf64_note;
cc->write_elf32_note = riscv_cpu_write_elf32_note;
#endif
diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c
index d35eb39a1bb..197c4b87f30 100644
--- a/target/s390x/cpu.c
+++ b/target/s390x/cpu.c
@@ -517,7 +517,7 @@ static void s390_cpu_class_init(ObjectClass *oc, void *data)
cc->gdb_write_register = s390_cpu_gdb_write_register;
#ifndef CONFIG_USER_ONLY
cc->get_phys_page_debug = s390_cpu_get_phys_page_debug;
- cc->vmsd = &vmstate_s390_cpu;
+ cc->legacy_vmsd = &vmstate_s390_cpu;
cc->get_crash_info = s390_cpu_get_crash_info;
cc->write_elf64_note = s390_cpu_write_elf64_note;
#endif
diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c
index aece2c7dc83..ba497561bfa 100644
--- a/target/sparc/cpu.c
+++ b/target/sparc/cpu.c
@@ -889,7 +889,7 @@ static void sparc_cpu_class_init(ObjectClass *oc, void
*data)
cc->gdb_write_register = sparc_cpu_gdb_write_register;
#ifndef CONFIG_USER_ONLY
cc->get_phys_page_debug = sparc_cpu_get_phys_page_debug;
- cc->vmsd = &vmstate_sparc_cpu;
+ cc->legacy_vmsd = &vmstate_sparc_cpu;
#endif
cc->disas_set_info = cpu_sparc_disas_set_info;
diff --git a/target/ppc/translate_init.c.inc b/target/ppc/translate_init.c.inc
index c03a7c4f526..110a68a867e 100644
--- a/target/ppc/translate_init.c.inc
+++ b/target/ppc/translate_init.c.inc
@@ -10920,7 +10920,7 @@ static void ppc_cpu_class_init(ObjectClass *oc, void
*data)
cc->gdb_write_register = ppc_cpu_gdb_write_register;
#ifndef CONFIG_USER_ONLY
cc->get_phys_page_debug = ppc_cpu_get_phys_page_debug;
- cc->vmsd = &vmstate_ppc_cpu;
+ cc->legacy_vmsd = &vmstate_ppc_cpu;
#endif
#if defined(CONFIG_SOFTMMU)
cc->write_elf64_note = ppc64_cpu_write_elf64_note;
--
2.26.3
- [PATCH v6 00/18] cpu: Introduce SysemuCPUOps structure, Philippe Mathieu-Daudé, 2021/04/22
- [PATCH v6 01/18] cpu: Un-inline cpu_get_phys_page_debug and cpu_asidx_from_attrs, Philippe Mathieu-Daudé, 2021/04/22
- [PATCH v6 02/18] cpu: Introduce cpu_virtio_is_big_endian(), Philippe Mathieu-Daudé, 2021/04/22
- [PATCH v6 03/18] cpu: Directly use cpu_write_elf*() fallback handlers in place, Philippe Mathieu-Daudé, 2021/04/22
- [PATCH v6 04/18] cpu: Directly use get_paging_enabled() fallback handlers in place, Philippe Mathieu-Daudé, 2021/04/22
- [PATCH v6 05/18] cpu: Directly use get_memory_mapping() fallback handlers in place, Philippe Mathieu-Daudé, 2021/04/22
- [PATCH v6 06/18] cpu: Assert DeviceClass::vmsd is NULL on user emulation, Philippe Mathieu-Daudé, 2021/04/22
- [PATCH v6 07/18] cpu: Rename CPUClass vmsd -> legacy_vmsd,
Philippe Mathieu-Daudé <=
- [PATCH v6 08/18] cpu/{avr, lm32, moxie}: Set DeviceClass vmsd field (not CPUClass one), Philippe Mathieu-Daudé, 2021/04/22
- [PATCH v6 09/18] cpu: Introduce SysemuCPUOps structure, Philippe Mathieu-Daudé, 2021/04/22
- [PATCH v6 10/18] cpu: Move CPUClass::vmsd to SysemuCPUOps, Philippe Mathieu-Daudé, 2021/04/22
- [PATCH v6 11/18] cpu: Move CPUClass::virtio_is_big_endian to SysemuCPUOps, Philippe Mathieu-Daudé, 2021/04/22
- [PATCH v6 12/18] cpu: Move CPUClass::get_crash_info to SysemuCPUOps, Philippe Mathieu-Daudé, 2021/04/22
- [PATCH v6 13/18] cpu: Move CPUClass::write_elf* to SysemuCPUOps, Philippe Mathieu-Daudé, 2021/04/22
- [PATCH v6 14/18] cpu: Move CPUClass::asidx_from_attrs to SysemuCPUOps, Philippe Mathieu-Daudé, 2021/04/22