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qemu-riscv (date)
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Last Modified: Mon Feb 28 2022 21:28:18 -0500
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February 28, 2022
Re: [PATCH v7 12/14] target/riscv: rvk: add CSR support for Zkr
,
Weiwei Li
,
21:28
Re: [PATCH v7 12/14] target/riscv: rvk: add CSR support for Zkr
,
Weiwei Li
,
20:44
Re: [PATCH v7 09/14] target/riscv: rvk: add support for sha512 related instructions for RV32 in zknh extension
,
Weiwei Li
,
20:29
Re: [PATCH v2 1/2] hw/ssi: Add Ibex SPI device model
,
Philippe Mathieu-Daudé
,
19:15
Re: [PATCH v2 2/2] riscv: opentitan: Connect opentitan SPI Host
,
Philippe Mathieu-Daudé
,
19:15
Re: [PATCH v7 12/14] target/riscv: rvk: add CSR support for Zkr
,
Richard Henderson
,
15:11
Re: [PATCH v7 11/14] target/riscv: rvk: add support for zksed/zksh extension
,
Richard Henderson
,
14:45
Re: [PATCH v7 10/14] target/riscv: rvk: add support for sha512 related instructions for RV64 in zknh extension
,
Richard Henderson
,
14:40
Re: [PATCH v7 09/14] target/riscv: rvk: add support for sha512 related instructions for RV32 in zknh extension
,
Richard Henderson
,
14:39
Re: [PATCH v7 08/14] target/riscv: rvk: add support for sha256 related instructions in zknh extension
,
Richard Henderson
,
14:03
Re: [PATCH v7 07/14] target/riscv: rvk: add support for zkne/zknd extension in RV64
,
Richard Henderson
,
14:01
Re: [PATCH v7 06/14] target/riscv: rvk: add support for zknd/zkne extension in RV32
,
Richard Henderson
,
13:57
Re: [PATCH v7 03/14] target/riscv: rvk: add support for zbkc extension
,
Richard Henderson
,
13:55
Re: [PATCH v7 02/14] target/riscv: rvk: add support for zbkb extension
,
Richard Henderson
,
13:55
Re: [PATCH v6 02/14] target/riscv: rvk: add support for zbkb extension
,
Richard Henderson
,
13:16
[PATCH v7 11/14] target/riscv: rvk: add support for zksed/zksh extension
,
Weiwei Li
,
09:55
[PATCH v7 12/14] target/riscv: rvk: add CSR support for Zkr
,
Weiwei Li
,
09:55
[PATCH v7 13/14] disas/riscv.c: rvk: add disas support for Zbk* and Zk* instructions
,
Weiwei Li
,
09:49
[PATCH v7 14/14] target/riscv: rvk: expose zbk* and zk* properties
,
Weiwei Li
,
09:49
[PATCH v7 10/14] target/riscv: rvk: add support for sha512 related instructions for RV64 in zknh extension
,
Weiwei Li
,
09:49
[PATCH v7 09/14] target/riscv: rvk: add support for sha512 related instructions for RV32 in zknh extension
,
Weiwei Li
,
09:49
[PATCH v7 05/14] crypto: move sm4_sbox from target/arm
,
Weiwei Li
,
09:49
[PATCH v7 07/14] target/riscv: rvk: add support for zkne/zknd extension in RV64
,
Weiwei Li
,
09:49
[PATCH v7 06/14] target/riscv: rvk: add support for zknd/zkne extension in RV32
,
Weiwei Li
,
09:49
[PATCH v7 04/14] target/riscv: rvk: add support for zbkx extension
,
Weiwei Li
,
09:49
[PATCH v7 02/14] target/riscv: rvk: add support for zbkb extension
,
Weiwei Li
,
09:49
[PATCH v7 08/14] target/riscv: rvk: add support for sha256 related instructions in zknh extension
,
Weiwei Li
,
09:49
[PATCH v7 00/14] support subsets of scalar crypto extension
,
Weiwei Li
,
09:49
[PATCH v7 03/14] target/riscv: rvk: add support for zbkc extension
,
Weiwei Li
,
09:49
[PATCH v7 01/14] target/riscv: rvk: add cfg properties for zbk* and zk*
,
Weiwei Li
,
09:49
Re: [PATCH v2 1/2] hw/ssi: Add Ibex SPI device model
,
Alistair Francis
,
04:14
Re: [PATCH v2 2/2] riscv: opentitan: Connect opentitan SPI Host
,
Alistair Francis
,
03:31
Re: [PATCH v6 0/6] support subsets of Float-Point in Integer Registers extensions
,
Alistair Francis
,
03:28
February 27, 2022
Re: [PATCH v5 06/12] target/riscv: Add support for hpmcounters/hpmevents
,
Alistair Francis
,
23:17
Re: [PATCH v6 5/6] target/riscv: add support for zhinx/zhinxmin
,
Alistair Francis
,
23:10
Re: [PATCH v6 4/6] target/riscv: add support for zdinx
,
Alistair Francis
,
23:01
Re: [PATCH v6 3/6] target/riscv: add support for zfinx
,
Alistair Francis
,
22:55
[PATCH v2 2/2] riscv: opentitan: Connect opentitan SPI Host
,
Alistair Francis
,
22:41
[PATCH v2 1/2] hw/ssi: Add Ibex SPI device model
,
Alistair Francis
,
22:41
Re: [PATCH v6 11/14] target/riscv: rvk: add support for zksed/zksh extension
,
Weiwei Li
,
22:20
Re: [PATCH v6 09/14] target/riscv: rvk: add support for sha512 related instructions for RV32 in zknh extension
,
Weiwei Li
,
22:18
Re: [PATCH v6 08/14] target/riscv: rvk: add support for sha256 related instructions in zknh extension
,
Weiwei Li
,
22:12
Re: [PATCH v6 07/14] target/riscv: rvk: add support for zkne/zknd extension in RV64
,
Weiwei Li
,
22:10
Re: [PATCH v6 06/14] target/riscv: rvk: add support for zknd/zkne extension in RV32
,
Weiwei Li
,
22:08
Re: [PATCH v6 02/14] target/riscv: rvk: add support for zbkb extension
,
Weiwei Li
,
22:03
Re: [PATCH v6 11/14] target/riscv: rvk: add support for zksed/zksh extension
,
Richard Henderson
,
14:41
Re: [PATCH v6 10/14] target/riscv: rvk: add support for sha512 related instructions for RV64 in zknh extension
,
Richard Henderson
,
14:36
Re: [PATCH v6 09/14] target/riscv: rvk: add support for sha512 related instructions for RV32 in zknh extension
,
Richard Henderson
,
14:36
Re: [PATCH v6 08/14] target/riscv: rvk: add support for sha256 related instructions in zknh extension
,
Richard Henderson
,
14:21
Re: [PATCH v6 07/14] target/riscv: rvk: add support for zkne/zknd extension in RV64
,
Richard Henderson
,
14:14
Re: [PATCH v6 06/14] target/riscv: rvk: add support for zknd/zkne extension in RV32
,
Richard Henderson
,
14:05
Re: [PATCH v6 05/14] crypto: move sm4_sbox from target/arm
,
Richard Henderson
,
13:51
Re: [PATCH v6 04/14] target/riscv: rvk: add support for zbkx extension
,
Richard Henderson
,
13:50
Re: [PATCH v6 02/14] target/riscv: rvk: add support for zbkb extension
,
Richard Henderson
,
13:47
[PATCH v6 10/14] target/riscv: rvk: add support for sha512 related instructions for RV64 in zknh extension
,
Weiwei Li
,
09:35
[PATCH v6 14/14] target/riscv: rvk: expose zbk* and zk* properties
,
Weiwei Li
,
09:35
[PATCH v6 11/14] target/riscv: rvk: add support for zksed/zksh extension
,
Weiwei Li
,
09:35
[PATCH v6 13/14] disas/riscv.c: rvk: add disas support for Zbk* and Zk* instructions
,
Weiwei Li
,
09:28
[PATCH v6 07/14] target/riscv: rvk: add support for zkne/zknd extension in RV64
,
Weiwei Li
,
09:28
[PATCH v6 12/14] target/riscv: rvk: add CSR support for Zkr
,
Weiwei Li
,
09:28
[PATCH v6 09/14] target/riscv: rvk: add support for sha512 related instructions for RV32 in zknh extension
,
Weiwei Li
,
09:28
[PATCH v6 01/14] target/riscv: rvk: add cfg properties for zbk* and zk*
,
Weiwei Li
,
09:28
[PATCH v6 03/14] target/riscv: rvk: add support for zbkc extension
,
Weiwei Li
,
09:28
[PATCH v6 02/14] target/riscv: rvk: add support for zbkb extension
,
Weiwei Li
,
09:28
[PATCH v6 06/14] target/riscv: rvk: add support for zknd/zkne extension in RV32
,
Weiwei Li
,
09:28
[PATCH v6 08/14] target/riscv: rvk: add support for sha256 related instructions in zknh extension
,
Weiwei Li
,
09:28
[PATCH v6 05/14] crypto: move sm4_sbox from target/arm
,
Weiwei Li
,
09:27
[PATCH v6 04/14] target/riscv: rvk: add support for zbkx extension
,
Weiwei Li
,
09:27
[PATCH v6 00/14] support subsets of scalar crypto extension
,
Weiwei Li
,
09:27
February 26, 2022
Re: [PATCH v3] target/riscv: Add isa extenstion strings to the device tree
,
Frank Chang
,
02:45
February 24, 2022
Re: [PATCH v3] target/riscv: Add isa extenstion strings to the device tree
,
Alistair Francis
,
00:16
February 23, 2022
Re: [PATCH v1 1/2] hw/ssi: Add Ibex SPI device model
,
Alistair Francis
,
22:40
[PATCH v4 14/14] hw: set user_creatable on opentitan/sifive_e devices
,
Damien Hedde
,
04:08
Re: [PATCH v3] target/riscv: Add isa extenstion strings to the device tree
,
Anup Patel
,
01:44
February 22, 2022
Re: [PATCH v4 5/6] target/riscv: Add *envcfg* CSRs support
,
Alistair Francis
,
23:34
Re: [PATCH v1 2/2] riscv: opentitan: Connect opentitan SPI Host
,
Alistair Francis
,
23:14
Re: [PATCH v4 5/6] target/riscv: Add *envcfg* CSRs support
,
Alistair Francis
,
23:11
[PATCH v3] target/riscv: Add isa extenstion strings to the device tree
,
Atish Patra
,
17:39
Re: [PATCH v2] target/riscv: Add isa extenstion strings to the device tree
,
Atish Patra
,
17:29
[PATCH v4 5/6] target/riscv: Add *envcfg* CSRs support
,
Atish Patra
,
17:07
[PATCH v4 4/6] target/riscv: Add support for mconfigptr
,
Atish Patra
,
17:07
[PATCH v4 1/6] target/riscv: Define simpler privileged spec version numbering
,
Atish Patra
,
17:07
[PATCH v4 6/6] target/riscv: Enable privileged spec version 1.12
,
Atish Patra
,
17:07
[PATCH v4 3/6] target/riscv: Introduce privilege version field in the CSR ops.
,
Atish Patra
,
17:07
[PATCH v4 2/6] target/riscv: Add the privileged spec version 1.12.0
,
Atish Patra
,
17:07
[PATCH v4 0/6] Privilege version update
,
Atish Patra
,
17:07
[PATCH v1 2/2] riscv: opentitan: Connect opentitan SPI Host
,
Alistair Francis
,
16:45
[PATCH v1 1/2] hw/ssi: Add Ibex SPI device model
,
Alistair Francis
,
16:45
Re: [PATCH v3 3/6] target/riscv: Introduce privilege version field in the CSR ops.
,
Atish Patra
,
15:43
Re: [PATCH v2 9/9] hw/riscv: virt: Set the clock-frequency
,
Peter Maydell
,
10:47
February 21, 2022
Re: [PATCH 2/2] hw/riscv/sifive_u: Resolve redundant property accessors
,
Philippe Mathieu-Daudé
,
18:05
Re: [RFC PATCH v2 2/3] hw/intc: Support 32/64-bit mtimecmp and mtime accesses in RISC-V ACLINT
,
Alistair Francis
,
16:57
Re: [RFC PATCH v2 3/3] hw/intc: Make RISC-V ACLINT mtime MMIO register writable
,
Alistair Francis
,
16:55
Re: [RFC PATCH v2 2/3] hw/intc: Support 32/64-bit mtimecmp and mtime accesses in RISC-V ACLINT
,
Alistair Francis
,
16:50
Re: [RFC PATCH v2 1/3] hw/intc: Add .impl.[min|max]_access_size declaration in RISC-V ACLINT
,
Alistair Francis
,
16:48
Re: [PATCH 2/2] hw/riscv/sifive_u: Resolve redundant property accessors
,
Alistair Francis
,
16:46
Re: [PATCH v3 4/6] target/riscv: Add support for mconfigptr
,
Alistair Francis
,
16:42
Re: [PATCH v3 3/6] target/riscv: Introduce privilege version field in the CSR ops.
,
Alistair Francis
,
16:41
Re: [PATCH v3 6/6] target/riscv: Enable privileged spec version 1.12
,
Alistair Francis
,
16:41
Re: [PATCH v3 2/6] target/riscv: Add the privileged spec version 1.12.0
,
Alistair Francis
,
16:38
Re: [PATCH v3 1/6] target/riscv: Define simpler privileged spec version numbering
,
Alistair Francis
,
16:38
Re: [PATCH 1/5] hw/riscv/riscv_hart: free the harts array when the object is finalized
,
Damien Hedde
,
05:29
Re: [PATCH v2] hw: riscv: opentitan: fixup SPI addresses
,
Alistair Francis
,
02:14
Re: [PATCH v10 0/5] QEMU RISC-V AIA support
,
Alistair Francis
,
02:12
February 20, 2022
[PATCH v10 5/5] hw/riscv: virt: Increase maximum number of allowed CPUs
,
Anup Patel
,
03:56
[PATCH v10 4/5] docs/system: riscv: Document AIA options for virt machine
,
Anup Patel
,
03:56
[PATCH v10 3/5] hw/riscv: virt: Add optional AIA IMSIC support to virt machine
,
Anup Patel
,
03:56
[PATCH v10 2/5] hw/intc: Add RISC-V AIA IMSIC device emulation
,
Anup Patel
,
03:56
[PATCH v10 1/5] hw/riscv: virt: Add optional AIA APLIC support to virt machine
,
Anup Patel
,
03:56
[PATCH v10 0/5] QEMU RISC-V AIA support
,
Anup Patel
,
03:56
February 18, 2022
[PATCH v5 11/12] hw/riscv: virt: Add PMU DT node to the device tree
,
Atish Patra
,
19:26
[PATCH v5 08/12] target/riscv: Add sscofpmf extension support
,
Atish Patra
,
19:26
[PATCH v5 12/12] target/riscv: Update the privilege field for sscofpmf CSRs
,
Atish Patra
,
19:26
[PATCH v5 07/12] target/riscv: Support mcycle/minstret write operation
,
Atish Patra
,
19:26
[PATCH v5 10/12] target/riscv: Add few cache related PMU events
,
Atish Patra
,
19:26
[PATCH v5 09/12] target/riscv: Simplify counter predicate function
,
Atish Patra
,
19:26
[PATCH v5 06/12] target/riscv: Add support for hpmcounters/hpmevents
,
Atish Patra
,
19:26
[PATCH v5 05/12] target/riscv: Implement mcountinhibit CSR
,
Atish Patra
,
19:26
[PATCH v5 04/12] target/riscv: pmu: Make number of counters configurable
,
Atish Patra
,
19:26
[PATCH v5 03/12] target/riscv: pmu: Rename the counters extension to pmu
,
Atish Patra
,
19:26
[PATCH v5 02/12] target/riscv: Implement PMU CSR predicate function for S-mode
,
Atish Patra
,
19:26
[PATCH v5 00/12] Improve PMU support
,
Atish Patra
,
19:26
[PATCH v5 01/12] target/riscv: Fix PMU CSR predicate function
,
Atish Patra
,
19:26
[PATCH v5 00/12] Improve PMU support
,
Atish Patra
,
19:11
Re: [PATCH 1/5] hw/riscv/riscv_hart: free the harts array when the object is finalized
,
Peter Maydell
,
12:47
Re: [PATCH 1/5] hw/riscv/riscv_hart: free the harts array when the object is finalized
,
Damien Hedde
,
12:39
Re: [PATCH 1/5] hw/riscv/riscv_hart: free the harts array when the object is finalized
,
Peter Maydell
,
12:23
Re: riscv32 wait() problem, qemu or glibc?
,
Qemu devel
,
12:10
[PATCH 5/5] hw/intc/riscv_aclint: mtimer: report errors and free allocated memory
,
Damien Hedde
,
11:47
[PATCH 4/5] hw/intc/riscv_aclint: swi: report errors and free allocated memory
,
Damien Hedde
,
11:47
[PATCH 3/5] hw/intc/sifive_plic: report errors and free allocated memory
,
Damien Hedde
,
11:47
[PATCH 2/5] target/riscv: add riscv_cpu_release_claimed_interrupts function
,
Damien Hedde
,
11:47
[PATCH 1/5] hw/riscv/riscv_hart: free the harts array when the object is finalized
,
Damien Hedde
,
11:47
[PATCH 0/5] RiscV cleanups for user-related life cycles
,
Damien Hedde
,
11:47
Re: [PATCH] build: fix build failure with gcc 11.2 by disabling -fcf-protection
,
Paolo Bonzini
,
10:47
Re: [PATCH] build: fix build failure with gcc 11.2 by disabling -fcf-protection
,
Peter Maydell
,
08:14
Re: [PATCH v2] hw: riscv: opentitan: fixup SPI addresses
,
Bin Meng
,
04:06
[PATCH v2] hw: riscv: opentitan: fixup SPI addresses
,
Alistair Francis
,
01:39
February 17, 2022
[PATCH 2/2] hw/riscv/sifive_u: Resolve redundant property accessors
,
Bernhard Beschow
,
18:05
Re: [PATCH v4 2/2] target/riscv: Enable Zicbo[m,z,p] instructions
,
Weiwei Li
,
02:24
February 16, 2022
Re: [PATCH v4 2/2] target/riscv: Enable Zicbo[m,z,p] instructions
,
Christoph Müllner
,
23:00
Re: [PATCH v4 2/2] target/riscv: Enable Zicbo[m,z,p] instructions
,
Weiwei Li
,
21:15
[PATCH v4 0/2] riscv: Add support for Zicbo[m,z,p] instructions
,
Christoph Muellner
,
10:48
[PATCH v4 2/2] target/riscv: Enable Zicbo[m,z,p] instructions
,
Christoph Muellner
,
10:48
[PATCH v4 1/2] accel/tcg: Add probe_access_range_flags interface
,
Christoph Muellner
,
10:48
Re: [PATCH v3] target/riscv: Enable Zicbo[m,z,p] instructions
,
Christoph Müllner
,
08:52
Re: [PATCH v2] target/riscv: Add isa extenstion strings to the device tree
,
Heiko Stübner
,
06:42
Re: [PATCH v1] hw: riscv: opentitan: fixup SPI addresses
,
Bin Meng
,
02:40
Re: [PATCH v1] hw: riscv: opentitan: fixup SPI addresses
,
Alistair Francis
,
01:37
[PATCH v1] hw: riscv: opentitan: fixup SPI addresses
,
Alistair Francis
,
01:23
February 15, 2022
Re: [PATCH v2] target/riscv: Add isa extenstion strings to the device tree
,
Anup Patel
,
22:19
[PATCH v2] target/riscv: Add isa extenstion strings to the device tree
,
Atish Patra
,
19:09
Re: [PATCH] target/riscv: Add isa extenstion strings to the device tree
,
Heiko Stübner
,
16:20
Re: [PATCH] target/riscv: Add isa extenstion strings to the device tree
,
Atish Patra
,
14:39
Re: [PATCH] target/riscv: Add isa extenstion strings to the device tree
,
Heiko Stübner
,
11:20
Re: [PATCH] target/riscv: Add isa extenstion strings to the device tree
,
Heiko Stübner
,
04:58
[PATCH] target/riscv: Add isa extenstion strings to the device tree
,
Atish Patra
,
04:05
February 12, 2022
[PATCH 1/1] target/riscv: misa to ISA string conversion fix
,
Tsukasa OI
,
09:50
[PATCH 0/1] target/riscv: misa to ISA string conversion fix
,
Tsukasa OI
,
09:49
[RESEND PATCH 0/1] target/riscv: misa to ISA string conversion fix
,
Tsukasa OI
,
06:59
[RESEND PATCH 1/1] target/riscv: misa to ISA string conversion fix
,
Tsukasa OI
,
06:59
February 11, 2022
Re: [PATCH v9 00/23] QEMU RISC-V AIA support
,
Alistair Francis
,
03:29
February 10, 2022
[PATCH v6 0/6] support subsets of Float-Point in Integer Registers extensions
,
Weiwei Li
,
23:41
[PATCH v6 3/6] target/riscv: add support for zfinx
,
Weiwei Li
,
23:41
[PATCH v6 5/6] target/riscv: add support for zhinx/zhinxmin
,
Weiwei Li
,
23:41
[PATCH v6 4/6] target/riscv: add support for zdinx
,
Weiwei Li
,
23:41
[PATCH v6 6/6] target/riscv: expose zfinx, zdinx, zhinx{min} properties
,
Weiwei Li
,
23:41
[PATCH v6 2/6] target/riscv: hardwire mstatus.FS to zero when enable zfinx
,
Weiwei Li
,
23:41
[PATCH v6 1/6] target/riscv: add cfg properties for zfinx, zdinx and zhinx{min}
,
Weiwei Li
,
23:40
Re: [PATCH v3] target/riscv: Enable Zicbo[m,z,p] instructions
,
Weiwei Li
,
21:41
Re: [PATCH v3] target/riscv: Enable Zicbo[m,z,p] instructions
,
Richard Henderson
,
17:10
Re: [PATCH v3] target/riscv: Enable Zicbo[m,z,p] instructions
,
Philipp Tomsich
,
11:48
[PATCH v3] target/riscv: Enable Zicbo[m,z,p] instructions
,
Christoph Muellner
,
11:35
Re: [PATCH v9 00/23] QEMU RISC-V AIA support
,
Anup Patel
,
05:25
Re: [PATCH v9 00/23] QEMU RISC-V AIA support
,
Atish Patra
,
03:28
[RFC PATCH v2 3/3] hw/intc: Make RISC-V ACLINT mtime MMIO register writable
,
frank . chang
,
01:18
[RFC PATCH v2 2/3] hw/intc: Support 32/64-bit mtimecmp and mtime accesses in RISC-V ACLINT
,
frank . chang
,
01:18
[RFC PATCH v2 1/3] hw/intc: Add .impl.[min|max]_access_size declaration in RISC-V ACLINT
,
frank . chang
,
01:18
[RFC PATCH v2 0/3] Support ACLINT 32/64-bit mtimecmp/mtime read/write accesses
,
frank . chang
,
01:17
February 09, 2022
Re: [PATCH] docs/system: riscv: Update description of CPU
,
Alistair Francis
,
22:11
Re: [PATCH v9 0/5] support subsets of virtual memory extension
,
Alistair Francis
,
22:08
Re: [PATCH] docs/system: riscv: Update description of CPU
,
Alistair Francis
,
20:28
Re: [PATCH] target/riscv: Call probe_write() before atomic operations
,
Richard Henderson
,
02:27
[PATCH] target/riscv: Call probe_write() before atomic operations
,
Alistair Francis
,
00:49
February 08, 2022
Re: [RFC PATCH] hw/intc: Make RISC-V ACLINT mtime MMIO register writable
,
Frank Chang
,
21:37
[PATCH] build: fix build failure with gcc 11.2 by disabling -fcf-protection
,
Vineet Gupta
,
16:20
[PATCH] docs/system: riscv: Update description of CPU
,
Yu Li
,
09:05
Re: [PATCH v9 00/23] QEMU RISC-V AIA support
,
Anup Patel
,
02:34
Re: [PATCH v9 00/23] QEMU RISC-V AIA support
,
Alistair Francis
,
01:51
February 07, 2022
Re: [PATCH v9 00/23] QEMU RISC-V AIA support
,
Alistair Francis
,
23:16
February 06, 2022
[PATCH v3 6/6] target/riscv: Enable privileged spec version 1.12
,
Atish Patra
,
04:19
[PATCH v3 5/6] target/riscv: Add *envcfg* CSRs support
,
Atish Patra
,
04:18
[PATCH v3 4/6] target/riscv: Add support for mconfigptr
,
Atish Patra
,
04:18
[PATCH v3 3/6] target/riscv: Introduce privilege version field in the CSR ops.
,
Atish Patra
,
04:18
[PATCH v3 2/6] target/riscv: Add the privileged spec version 1.12.0
,
Atish Patra
,
04:18
[PATCH v3 1/6] target/riscv: Define simpler privileged spec version numbering
,
Atish Patra
,
04:18
[PATCH v3 0/6] Privilege version update
,
Atish Patra
,
04:18
February 05, 2022
Re: [PATCH v2 4/6] target/riscv: Add support for mconfigptr
,
Weiwei Li
,
06:26
Re: [PATCH v2 5/6] target/riscv: Add *envcfg* CSRs support
,
Weiwei Li
,
06:10
February 04, 2022
[PATCH v2 1/6] target/riscv: Define simpler privileged spec version numbering
,
Atish Patra
,
19:44
[PATCH v2 3/6] target/riscv: Introduce privilege version field in the CSR ops.
,
Atish Patra
,
19:44
[PATCH v2 4/6] target/riscv: Add support for mconfigptr
,
Atish Patra
,
19:42
[PATCH v2 6/6] target/riscv: Enable privileged spec version 1.12
,
Atish Patra
,
19:37
[PATCH v2 5/6] target/riscv: Add *envcfg* CSRs support
,
Atish Patra
,
19:37
[PATCH v2 2/6] target/riscv: Add the privileged spec version 1.12.0
,
Atish Patra
,
19:36
[PATCH v2 0/6] Privilege version update
,
Atish Patra
,
19:36
Re: [PATCH 0/2] RISC-V: Correctly generate store/amo faults
,
Richard Henderson
,
15:33
[PATCH v9 23/23] hw/riscv: virt: Increase maximum number of allowed CPUs
,
Anup Patel
,
12:49
[PATCH v9 22/23] docs/system: riscv: Document AIA options for virt machine
,
Anup Patel
,
12:49
[PATCH v9 21/23] hw/riscv: virt: Add optional AIA IMSIC support to virt machine
,
Anup Patel
,
12:49
[PATCH v9 20/23] hw/intc: Add RISC-V AIA IMSIC device emulation
,
Anup Patel
,
12:49
[PATCH v9 18/23] hw/intc: Add RISC-V AIA APLIC device emulation
,
Anup Patel
,
12:49
[PATCH v9 19/23] hw/riscv: virt: Add optional AIA APLIC support to virt machine
,
Anup Patel
,
12:49
[PATCH v9 17/23] target/riscv: Allow users to force enable AIA CSRs in HART
,
Anup Patel
,
12:48
[PATCH v9 13/23] target/riscv: Implement AIA mtopi, stopi, and vstopi CSRs
,
Anup Patel
,
12:48
[PATCH v9 16/23] hw/riscv: virt: Use AIA INTC compatible string when available
,
Anup Patel
,
12:48
[PATCH v9 15/23] target/riscv: Implement AIA IMSIC interface CSRs
,
Anup Patel
,
12:48
[PATCH v9 12/23] target/riscv: Implement AIA interrupt filtering CSRs
,
Anup Patel
,
12:48
[PATCH v9 14/23] target/riscv: Implement AIA xiselect and xireg CSRs
,
Anup Patel
,
12:48
[PATCH v9 11/23] target/riscv: Implement AIA hvictl and hviprioX CSRs
,
Anup Patel
,
12:48
[PATCH v9 10/23] target/riscv: Implement AIA CSRs for 64 local interrupts on RV32
,
Anup Patel
,
12:48
[PATCH v9 09/23] target/riscv: Implement AIA local interrupt priorities
,
Anup Patel
,
12:48
[PATCH v9 08/23] target/riscv: Allow AIA device emulation to set ireg rmw callback
,
Anup Patel
,
12:47
[PATCH v9 07/23] target/riscv: Add defines for AIA CSRs
,
Anup Patel
,
12:47
[PATCH v9 06/23] target/riscv: Add AIA cpu feature
,
Anup Patel
,
12:47
[PATCH v9 05/23] target/riscv: Allow setting CPU feature from machine/device emulation
,
Anup Patel
,
12:47
[PATCH v9 04/23] target/riscv: Improve delivery of guest external interrupts
,
Anup Patel
,
12:47
[PATCH v9 03/23] target/riscv: Implement hgeie and hgeip CSRs
,
Anup Patel
,
12:47
[PATCH v9 02/23] target/riscv: Implement SGEIP bit in hip and hie CSRs
,
Anup Patel
,
12:47
[PATCH v9 01/23] target/riscv: Fix trap cause for RV32 HS-mode CSR access from RV64 HS-mode
,
Anup Patel
,
12:47
[PATCH v9 00/23] QEMU RISC-V AIA support
,
Anup Patel
,
12:47
Re: [PATCH 0/2] RISC-V: Correctly generate store/amo faults
,
Alistair Francis
,
02:37
February 03, 2022
[PATCH v9 0/5] support subsets of virtual memory extension
,
Weiwei Li
,
21:27
[PATCH v9 2/5] target/riscv: add PTE_A/PTE_D/PTE_U bits check for inner PTE
,
Weiwei Li
,
21:27
[PATCH v9 4/5] target/riscv: add support for svinval extension
,
Weiwei Li
,
21:27
[PATCH v9 1/5] target/riscv: Ignore reserved bits in PTE for RV64
,
Weiwei Li
,
21:27
[PATCH v9 3/5] target/riscv: add support for svnapot extension
,
Weiwei Li
,
21:27
[PATCH v9 5/5] target/riscv: add support for svpbmt extension
,
Weiwei Li
,
21:27
Re: [RFC 4/5] target/riscv: Add *envcfg* CSRs support
,
Atish Kumar Patra
,
15:39
Re: [RFC 4/5] target/riscv: Add *envcfg* CSRs support
,
Heiko Stübner
,
07:24
February 02, 2022
Re: [PATCH v8 3/5] target/riscv: add support for svnapot extension
,
Weiwei Li
,
21:45
Re: [PATCH v8 5/5] target/riscv: add support for svpbmt extension
,
Alistair Francis
,
20:07
Re: [PATCH v8 4/5] target/riscv: add support for svinval extension
,
Alistair Francis
,
20:05
Re: [PATCH v8 3/5] target/riscv: add support for svnapot extension
,
Alistair Francis
,
17:26
Re: [PATCH] target/riscv: Fix vill field write in vtype
,
Alistair Francis
,
01:41
February 01, 2022
Re: [PATCH] target/riscv: Fix vill field write in vtype
,
Richard Henderson
,
19:38
Re: [PATCH 0/2] RISC-V: Correctly generate store/amo faults
,
Richard Henderson
,
19:37
[PATCH v8 4/5] target/riscv: add support for svinval extension
,
Weiwei Li
,
10:04
[PATCH v8 3/5] target/riscv: add support for svnapot extension
,
Weiwei Li
,
10:04
[PATCH v8 1/5] target/riscv: Ignore reserved bits in PTE for RV64
,
Weiwei Li
,
10:04
[PATCH v8 5/5] target/riscv: add support for svpbmt extension
,
Weiwei Li
,
10:04
[PATCH v8 2/5] target/riscv: add PTE_A/PTE_D/PTE_U bits check for inner PTE
,
Weiwei Li
,
09:49
[PATCH v8 0/5] support subsets of virtual memory extension
,
Weiwei Li
,
09:49
Re: [PATCH v7 1/5] target/riscv: Ignore reserved bits in PTE for RV64
,
Weiwei Li
,
07:57
Re: [PATCH v7 3/5] target/riscv: add support for svnapot extension
,
Weiwei Li
,
07:57
[PATCH] target/riscv: Fix vill field write in vtype
,
LIU Zhiwei
,
01:46
Re: [PATCH v7 3/5] target/riscv: add support for svnapot extension
,
Alistair Francis
,
01:23
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