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[PATCH qemu v3 03/10] target/riscv: rvv: Add mask agnostic for vx instru
From: |
~eopxd |
Subject: |
[PATCH qemu v3 03/10] target/riscv: rvv: Add mask agnostic for vx instructions |
Date: |
Thu, 12 May 2022 08:55:21 -0000 |
From: Yueh-Ting (eop) Chen <eop.chen@sifive.com>
Signed-off-by: eop Chen <eop.chen@sifive.com>
Reviewed-by: Frank Chang <frank.chang@sifive.com>
Reviewed-by: Weiwei Li <liweiwei@iscas.ac.cn>
---
target/riscv/insn_trans/trans_rvv.c.inc | 2 ++
target/riscv/vector_helper.c | 3 +++
2 files changed, 5 insertions(+)
diff --git a/target/riscv/insn_trans/trans_rvv.c.inc
b/target/riscv/insn_trans/trans_rvv.c.inc
index 325c5120d4..9558c6edbf 100644
--- a/target/riscv/insn_trans/trans_rvv.c.inc
+++ b/target/riscv/insn_trans/trans_rvv.c.inc
@@ -1306,6 +1306,7 @@ static bool opivx_trans(uint32_t vd, uint32_t rs1,
uint32_t vs2, uint32_t vm,
data = FIELD_DP32(data, VDATA, LMUL, s->lmul);
data = FIELD_DP32(data, VDATA, VTA, s->vta);
data = FIELD_DP32(data, VDATA, VTA_ALL_1S, s->cfg_vta_all_1s);
+ data = FIELD_DP32(data, VDATA, VMA, s->vma);
desc = tcg_constant_i32(simd_desc(s->cfg_ptr->vlen / 8,
s->cfg_ptr->vlen / 8, data));
@@ -1473,6 +1474,7 @@ static bool opivi_trans(uint32_t vd, uint32_t imm,
uint32_t vs2, uint32_t vm,
data = FIELD_DP32(data, VDATA, LMUL, s->lmul);
data = FIELD_DP32(data, VDATA, VTA, s->vta);
data = FIELD_DP32(data, VDATA, VTA_ALL_1S, s->cfg_vta_all_1s);
+ data = FIELD_DP32(data, VDATA, VMA, s->vma);
desc = tcg_constant_i32(simd_desc(s->cfg_ptr->vlen / 8,
s->cfg_ptr->vlen / 8, data));
diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c
index a92d7dbd3c..d3da1acc0d 100644
--- a/target/riscv/vector_helper.c
+++ b/target/riscv/vector_helper.c
@@ -898,10 +898,13 @@ static void do_vext_vx(void *vd, void *v0, target_long
s1, void *vs2,
uint32_t vl = env->vl;
uint32_t total_elems = vext_get_total_elems(env, desc, esz);
uint32_t vta = vext_vta(desc);
+ uint32_t vma = vext_vma(desc);
uint32_t i;
for (i = env->vstart; i < vl; i++) {
if (!vm && !vext_elem_mask(v0, i)) {
+ /* set masked-off elements to 1s */
+ vext_set_elems_1s(vd, vma, i * esz, (i + 1) * esz);
continue;
}
fn(vd, s1, vs2, i);
--
2.34.2
- [PATCH qemu v3 00/10] Add mask agnostic behavior for rvv instructions, ~eopxd, 2022/05/12
- [PATCH qemu v3 03/10] target/riscv: rvv: Add mask agnostic for vx instructions,
~eopxd <=
- [PATCH qemu v3 06/10] target/riscv: rvv: Add mask agnostic for vector fix-point arithmetic instructions, ~eopxd, 2022/05/12
- [PATCH qemu v3 04/10] target/riscv: rvv: Add mask agnostic for vector integer shift instructions, ~eopxd, 2022/05/12
- [PATCH qemu v3 08/10] target/riscv: rvv: Add mask agnostic for vector mask instructions, ~eopxd, 2022/05/12
- [PATCH qemu v3 07/10] target/riscv: rvv: Add mask agnostic for vector floating-point instructions, ~eopxd, 2022/05/12
- [PATCH qemu v3 05/10] target/riscv: rvv: Add mask agnostic for vector integer comparison instructions, ~eopxd, 2022/05/12
- [PATCH qemu v3 01/10] target/riscv: rvv: Add mask agnostic for vv instructions, ~eopxd, 2022/05/12
- [PATCH qemu v3 09/10] target/riscv: rvv: Add mask agnostic for vector permutation instructions, ~eopxd, 2022/05/12
- [PATCH qemu v3 02/10] target/riscv: rvv: Add mask agnostic for vector load / store instructions, ~eopxd, 2022/05/12
- [PATCH qemu v3 10/10] target/riscv: rvv: Add option 'rvv_ma_all_1s' to enable optional mask agnostic behavior, ~eopxd, 2022/05/12
- Re: [PATCH qemu v3 00/10] Add mask agnostic behavior for rvv instructions, Weiwei Li, 2022/05/12