[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PATCH v3 06/20] target/riscv: remove cpu->cfg.ext_c
From: |
Daniel Henrique Barboza |
Subject: |
[PATCH v3 06/20] target/riscv: remove cpu->cfg.ext_c |
Date: |
Wed, 29 Mar 2023 14:28:49 -0300 |
Create a new "c" RISCVCPUMisaExtConfig property that will update
env->misa_ext* with RVC. Instances of cpu->cfg.ext_c and similar are
replaced with riscv_has_ext(env, RVC).
Remove the old "c" property and 'ext_c' from RISCVCPUConfig.
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Weiwei Li <liweiwei@iscas.ac.cn>
---
target/riscv/cpu.c | 7 +++----
target/riscv/cpu.h | 1 -
2 files changed, 3 insertions(+), 5 deletions(-)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index 63efd1b313..693ff10cab 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -400,7 +400,6 @@ static void rv64_thead_c906_cpu_init(Object *obj)
set_priv_version(env, PRIV_VERSION_1_11_0);
cpu->cfg.ext_g = true;
- cpu->cfg.ext_c = true;
cpu->cfg.ext_u = true;
cpu->cfg.ext_s = true;
cpu->cfg.ext_icsr = true;
@@ -1108,7 +1107,7 @@ static void riscv_cpu_sync_misa_cfg(CPURISCVState *env)
if (riscv_cpu_cfg(env)->ext_d) {
ext |= RVD;
}
- if (riscv_cpu_cfg(env)->ext_c) {
+ if (riscv_has_ext(env, RVC)) {
ext |= RVC;
}
if (riscv_cpu_cfg(env)->ext_s) {
@@ -1438,6 +1437,8 @@ static void cpu_get_misa_ext_cfg(Object *obj, Visitor *v,
const char *name,
static const RISCVCPUMisaExtConfig misa_ext_cfgs[] = {
{.name = "a", .description = "Atomic instructions",
.misa_bit = RVA, .enabled = true},
+ {.name = "c", .description = "Compressed instructions",
+ .misa_bit = RVC, .enabled = true},
};
static void riscv_cpu_add_misa_properties(Object *cpu_obj)
@@ -1466,7 +1467,6 @@ static Property riscv_cpu_extensions[] = {
DEFINE_PROP_BOOL("m", RISCVCPU, cfg.ext_m, true),
DEFINE_PROP_BOOL("f", RISCVCPU, cfg.ext_f, true),
DEFINE_PROP_BOOL("d", RISCVCPU, cfg.ext_d, true),
- DEFINE_PROP_BOOL("c", RISCVCPU, cfg.ext_c, true),
DEFINE_PROP_BOOL("s", RISCVCPU, cfg.ext_s, true),
DEFINE_PROP_BOOL("u", RISCVCPU, cfg.ext_u, true),
DEFINE_PROP_BOOL("v", RISCVCPU, cfg.ext_v, false),
@@ -1580,7 +1580,6 @@ static void register_cpu_props(Object *obj)
cpu->cfg.ext_f = misa_ext & RVF;
cpu->cfg.ext_d = misa_ext & RVD;
cpu->cfg.ext_v = misa_ext & RVV;
- cpu->cfg.ext_c = misa_ext & RVC;
cpu->cfg.ext_s = misa_ext & RVS;
cpu->cfg.ext_u = misa_ext & RVU;
cpu->cfg.ext_h = misa_ext & RVH;
diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
index f703888310..c6dc24d236 100644
--- a/target/riscv/cpu.h
+++ b/target/riscv/cpu.h
@@ -424,7 +424,6 @@ struct RISCVCPUConfig {
bool ext_m;
bool ext_f;
bool ext_d;
- bool ext_c;
bool ext_s;
bool ext_u;
bool ext_h;
--
2.39.2
- [PATCH v3 00/20] remove MISA ext_N flags from cpu->cfg,, Daniel Henrique Barboza, 2023/03/29
- [PATCH v3 01/20] target/riscv: sync env->misa_ext* with cpu->cfg in realize(), Daniel Henrique Barboza, 2023/03/29
- [PATCH v3 02/20] target/riscv: remove MISA properties from isa_edata_arr[], Daniel Henrique Barboza, 2023/03/29
- [PATCH v3 03/20] target/riscv/cpu.c: remove 'multi_letter' from isa_ext_data, Daniel Henrique Barboza, 2023/03/29
- [PATCH v3 04/20] target/riscv: introduce riscv_cpu_add_misa_properties(), Daniel Henrique Barboza, 2023/03/29
- [PATCH v3 05/20] target/riscv: remove cpu->cfg.ext_a, Daniel Henrique Barboza, 2023/03/29
- [PATCH v3 06/20] target/riscv: remove cpu->cfg.ext_c,
Daniel Henrique Barboza <=
- [PATCH v3 07/20] target/riscv: remove cpu->cfg.ext_d, Daniel Henrique Barboza, 2023/03/29
- [PATCH v3 11/20] target/riscv: remove cpu->cfg.ext_m, Daniel Henrique Barboza, 2023/03/29
- [PATCH v3 10/20] target/riscv: remove cpu->cfg.ext_e, Daniel Henrique Barboza, 2023/03/29
- [PATCH v3 08/20] target/riscv: remove cpu->cfg.ext_f, Daniel Henrique Barboza, 2023/03/29
- [PATCH v3 13/20] target/riscv: remove cpu->cfg.ext_u, Daniel Henrique Barboza, 2023/03/29
- [PATCH v3 09/20] target/riscv: remove cpu->cfg.ext_i, Daniel Henrique Barboza, 2023/03/29
- [PATCH v3 12/20] target/riscv: remove cpu->cfg.ext_s, Daniel Henrique Barboza, 2023/03/29
- [PATCH v3 14/20] target/riscv: remove cpu->cfg.ext_h, Daniel Henrique Barboza, 2023/03/29
- [PATCH v3 15/20] target/riscv: remove cpu->cfg.ext_j, Daniel Henrique Barboza, 2023/03/29
- [PATCH v3 16/20] target/riscv: remove cpu->cfg.ext_v, Daniel Henrique Barboza, 2023/03/29