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[PATCH for-9.0 v12 03/18] target/riscv/tcg: update priv_ver on user_set
From: |
Daniel Henrique Barboza |
Subject: |
[PATCH for-9.0 v12 03/18] target/riscv/tcg: update priv_ver on user_set extensions |
Date: |
Fri, 24 Nov 2023 17:23:38 -0300 |
We'll add a new bare CPU type that won't have any default priv_ver. This
means that the CPU will default to priv_ver = 0, i.e. 1.10.0.
At the same we'll allow these CPUs to enable extensions at will, but
then, if the extension has a priv_ver newer than 1.10, we'll end up
disabling it. Users will then need to manually set priv_ver to something
other than 1.10 to enable the extensions they want, which is not ideal.
Change the setter() of extensions to allow user enabled extensions to
bump the priv_ver of the CPU. This will make it convenient for users to
enable extensions for CPUs that doesn't set a default priv_ver.
This change does not affect any existing CPU: vendor CPUs does not allow
extensions to be enabled, and generic CPUs are already set to priv_ver
LATEST.
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
---
target/riscv/tcg/tcg-cpu.c | 32 ++++++++++++++++++++++++++++++++
1 file changed, 32 insertions(+)
diff --git a/target/riscv/tcg/tcg-cpu.c b/target/riscv/tcg/tcg-cpu.c
index 7670120673..aee98db6f8 100644
--- a/target/riscv/tcg/tcg-cpu.c
+++ b/target/riscv/tcg/tcg-cpu.c
@@ -114,6 +114,26 @@ static int cpu_cfg_ext_get_min_version(uint32_t ext_offset)
g_assert_not_reached();
}
+static void cpu_bump_multi_ext_priv_ver(CPURISCVState *env,
+ uint32_t ext_offset)
+{
+ int ext_priv_ver;
+
+ if (env->priv_ver == PRIV_VERSION_LATEST) {
+ return;
+ }
+
+ ext_priv_ver = cpu_cfg_ext_get_min_version(ext_offset);
+
+ if (env->priv_ver < ext_priv_ver) {
+ /*
+ * Note: the 'priv_spec' command line option, if present,
+ * will take precedence over this priv_ver bump.
+ */
+ env->priv_ver = ext_priv_ver;
+ }
+}
+
static void cpu_cfg_ext_auto_update(RISCVCPU *cpu, uint32_t ext_offset,
bool value)
{
@@ -757,6 +777,14 @@ static void cpu_set_misa_ext_cfg(Object *obj, Visitor *v,
const char *name,
return;
}
+ if (misa_bit == RVH && env->priv_ver < PRIV_VERSION_1_12_0) {
+ /*
+ * Note: the 'priv_spec' command line option, if present,
+ * will take precedence over this priv_ver bump.
+ */
+ env->priv_ver = PRIV_VERSION_1_12_0;
+ }
+
env->misa_ext |= misa_bit;
env->misa_ext_mask |= misa_bit;
} else {
@@ -886,6 +914,10 @@ static void cpu_set_multi_ext_cfg(Object *obj, Visitor *v,
const char *name,
return;
}
+ if (value) {
+ cpu_bump_multi_ext_priv_ver(&cpu->env, multi_ext_cfg->offset);
+ }
+
isa_ext_update_enabled(cpu, multi_ext_cfg->offset, value);
}
--
2.41.0
- [PATCH for-9.0 v12 00/18] riscv: rv64i/rva22u64 CPUs, RVA22U64 profile support, Daniel Henrique Barboza, 2023/11/24
- [PATCH for-9.0 v12 01/18] target/riscv: create TYPE_RISCV_VENDOR_CPU, Daniel Henrique Barboza, 2023/11/24
- [PATCH for-9.0 v12 02/18] target/riscv/tcg: do not use "!generic" CPU checks, Daniel Henrique Barboza, 2023/11/24
- [PATCH for-9.0 v12 05/18] target/riscv: add zicbop extension flag, Daniel Henrique Barboza, 2023/11/24
- [PATCH for-9.0 v12 03/18] target/riscv/tcg: update priv_ver on user_set extensions,
Daniel Henrique Barboza <=
- [PATCH for-9.0 v12 04/18] target/riscv: add rv64i CPU, Daniel Henrique Barboza, 2023/11/24
- [PATCH for-9.0 v12 06/18] target/riscv/tcg: add 'zic64b' support, Daniel Henrique Barboza, 2023/11/24
- [PATCH for-9.0 v12 07/18] riscv-qmp-cmds.c: expose named features in cpu_model_expansion, Daniel Henrique Barboza, 2023/11/24
- [PATCH for-9.0 v12 08/18] target/riscv: add rva22u64 profile definition, Daniel Henrique Barboza, 2023/11/24
- [PATCH for-9.0 v12 09/18] target/riscv/kvm: add 'rva22u64' flag as unavailable, Daniel Henrique Barboza, 2023/11/24
- [PATCH for-9.0 v12 10/18] target/riscv/tcg: add user flag for profile support, Daniel Henrique Barboza, 2023/11/24
- [PATCH for-9.0 v12 11/18] target/riscv/tcg: add MISA user options hash, Daniel Henrique Barboza, 2023/11/24
- [PATCH for-9.0 v12 12/18] target/riscv/tcg: add riscv_cpu_write_misa_bit(), Daniel Henrique Barboza, 2023/11/24
- [PATCH for-9.0 v12 13/18] target/riscv/tcg: handle profile MISA bits, Daniel Henrique Barboza, 2023/11/24
- [PATCH for-9.0 v12 14/18] target/riscv/tcg: add hash table insert helpers, Daniel Henrique Barboza, 2023/11/24