Re: Re: [PATCH v13 00/26] riscv: RVA22 profiles support

[Andrew Jones]

On Tue, Jan 02, 2024 at 08:40:48AM -0300, Daniel Henrique Barboza wrote:
> Hi,
> 
> Drew brought to my attention the following post on the tech-unprivileged 
> mailing
> list:
> 
> "Architecture Review Committee meeting minutes, 12/19/23"
> https://lists.riscv.org/g/tech-unprivileged/message/611
> 
> Second paragraph mentions:
> 
> "In response to some recent discussion in the Apps and Tools HC about how 
> profiles should
> be represented in GCC/LLVM, the ARC provides this answer: compilers should 
> use a single parameter
> for an ISA string.  An ISA string begins with either a base ISA name (e.g. 
> rv64i) or a profile name
> (e.g. rva23u64) and is optionally followed by additional extensions (e.g.  
> rv64imac_zicond or
> rva23u64_zfh_zicond).  If the ISA string begins with a profile name, it is 
> equivalent to
> replacing the profile name with its mandatory base ISA and its mandatory 
> extensions; any
> optional extensions in a profile must be explicitly named if their inclusion 
> is desired.
> ISAs are sets, and concatenating strings takes the union, so redundancy is 
> legal (e.g.
> rva23u64, rva23u64_zicsr, and rva23u64_zicsr_zicsr are all valid and 
> equivalent)."
> 
> The takeaways from it:
> 
> - this implementation is compliant with how profiles are interpreted, i.e. a 
> profile is
> considered a set of the mandatory base ISA and mandatory extensions, and any 
> additional/optional
> extensions must be explicitly named;

Yes, it's good QEMU's RISC-V CPU model command line will be consistent
with the above paragraph (and then presumably with RISC-V compiler
"ISA strings")

> 
> - our ISA string format is also since we use the base ISA name + extensions 
> format already.
> This series don't  change/add anything in this regard.
> 
> 
> If we have enough demand for it, I can do a follow-up to add support for the 
> ISA string
> profile format. I.e. this:
> 
> $ build/qemu-system-riscv64 -M virt -cpu rva22s64 (...)
> 
> # cat /proc/device-tree/cpus/cpu@0/riscv,isa
> rv64imafdc_zicbom_zicbop_zicboz_zicntr_zicsr_zifencei_zihintpause_zihpm_zfhmin_zca_zcd_zba_zbb_zbs_zkt_svinval_svpbmt
> 
> Would become this:
> 
> # cat /proc/device-tree/cpus/cpu@0/riscv,isa
> rva22s64

We can't do that. The "ISA string" referred to in the above command line
isn't the ISA string specified in "ISA Extension Naming Conventions" of
the unpriv spec, it's the string given to the compiler to tell it which
extensions it may assume when generating instructions.

Thanks,
drew