qemu-riscv
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [PATCH v3 0/2] riscv: support new isa extension detection devicetree


From: Alistair Francis
Subject: Re: [PATCH v3 0/2] riscv: support new isa extension detection devicetree properties
Date: Tue, 23 Jan 2024 15:50:11 +1000

On Mon, Jan 22, 2024 at 10:25 PM Conor Dooley <conor@kernel.org> wrote:
>
> On Mon, Jan 22, 2024 at 03:24:19PM +1000, Alistair Francis wrote:
> > On Wed, Jan 10, 2024 at 8:27 PM Conor Dooley <conor@kernel.org> wrote:
> > >
> > > From: Conor Dooley <conor.dooley@microchip.com>
> > >
> > > Making it a series to keep the standalone change to riscv_isa_string()
> > > that Drew reported separate.
> > >
> > > Changes in v3:
> > > - g_free() isa_extensions too
> > > - use misa_mxl_max rather than the compile target for the base isa
> > > - add a new patch changing riscv_isa_string() to do the same
> > > - drop a null check that cannot be null
> > > - rebased on top of Alistair's next branch
> >
> > Do you mind rebasing on
> > https://github.com/alistair23/qemu/tree/riscv-to-apply.next again?
> > There was a big re-org recently so lots of rebasing is required
>
> I can, sure. Do you want me to introduce the macro that I mentioned in
> the first patch as a helper for misa_mxl_max -> width conversions when I
> do?

Yes please!

Alistair

>
> Thanks,
> Conor.



reply via email to

[Prev in Thread] Current Thread [Next in Thread]