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[PATCH 02/24] exec: Declare CPUBreakpoint/CPUWatchpoint type in 'breakpo
From: |
Philippe Mathieu-Daudé |
Subject: |
[PATCH 02/24] exec: Declare CPUBreakpoint/CPUWatchpoint type in 'breakpoint.h' header |
Date: |
Thu, 18 Apr 2024 21:25:01 +0200 |
The CPUBreakpoint and CPUWatchpoint structures are declared
in "hw/core/cpu.h", which contains declarations related to
CPUState and CPUClass. Some source files only require the
BP/WP definitions and don't need to pull in all CPU* API.
In order to simplify, create a new "exec/breakpoint.h" header.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
include/exec/breakpoint.h | 23 +++++++++++++++++++++++
include/hw/core/cpu.h | 16 +---------------
target/arm/internals.h | 1 +
target/ppc/internal.h | 1 +
target/riscv/debug.h | 2 ++
5 files changed, 28 insertions(+), 15 deletions(-)
create mode 100644 include/exec/breakpoint.h
diff --git a/include/exec/breakpoint.h b/include/exec/breakpoint.h
new file mode 100644
index 0000000000..45038263e3
--- /dev/null
+++ b/include/exec/breakpoint.h
@@ -0,0 +1,23 @@
+#ifndef EXEC_BREAKPOINT_H
+#define EXEC_BREAKPOINT_H
+
+#include "qemu/queue.h"
+#include "exec/vaddr.h"
+#include "exec/memattrs.h" //MemTxAttrs
+
+typedef struct CPUBreakpoint {
+ vaddr pc;
+ int flags; /* BP_* */
+ QTAILQ_ENTRY(CPUBreakpoint) entry;
+} CPUBreakpoint;
+
+typedef struct CPUWatchpoint {
+ vaddr vaddr;
+ vaddr len;
+ vaddr hitaddr;
+ MemTxAttrs hitattrs;
+ int flags; /* BP_* */
+ QTAILQ_ENTRY(CPUWatchpoint) entry;
+} CPUWatchpoint;
+
+#endif
diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h
index 5f0422493b..6f5a16e0fc 100644
--- a/include/hw/core/cpu.h
+++ b/include/hw/core/cpu.h
@@ -22,6 +22,7 @@
#include "hw/qdev-core.h"
#include "disas/dis-asm.h"
+#include "exec/breakpoint.h"
#include "exec/hwaddr.h"
#include "exec/vaddr.h"
#include "exec/memattrs.h"
@@ -347,21 +348,6 @@ typedef struct CPUNegativeOffsetState {
bool can_do_io;
} CPUNegativeOffsetState;
-typedef struct CPUBreakpoint {
- vaddr pc;
- int flags; /* BP_* */
- QTAILQ_ENTRY(CPUBreakpoint) entry;
-} CPUBreakpoint;
-
-struct CPUWatchpoint {
- vaddr vaddr;
- vaddr len;
- vaddr hitaddr;
- MemTxAttrs hitattrs;
- int flags; /* BP_* */
- QTAILQ_ENTRY(CPUWatchpoint) entry;
-};
-
struct KVMState;
struct kvm_run;
diff --git a/target/arm/internals.h b/target/arm/internals.h
index dd3da211a3..a7c5ec1849 100644
--- a/target/arm/internals.h
+++ b/target/arm/internals.h
@@ -25,6 +25,7 @@
#ifndef TARGET_ARM_INTERNALS_H
#define TARGET_ARM_INTERNALS_H
+#include "exec/breakpoint.h"
#include "hw/registerfields.h"
#include "tcg/tcg-gvec-desc.h"
#include "syndrome.h"
diff --git a/target/ppc/internal.h b/target/ppc/internal.h
index 5b20ecbd33..601c0b533f 100644
--- a/target/ppc/internal.h
+++ b/target/ppc/internal.h
@@ -18,6 +18,7 @@
#ifndef PPC_INTERNAL_H
#define PPC_INTERNAL_H
+#include "exec/breakpoint.h"
#include "hw/registerfields.h"
/* PM instructions */
diff --git a/target/riscv/debug.h b/target/riscv/debug.h
index 5794aa6ee5..c347863578 100644
--- a/target/riscv/debug.h
+++ b/target/riscv/debug.h
@@ -22,6 +22,8 @@
#ifndef RISCV_DEBUG_H
#define RISCV_DEBUG_H
+#include "exec/breakpoint.h"
+
#define RV_MAX_TRIGGERS 2
/* register index of tdata CSRs */
--
2.41.0
- [PATCH 00/24] include/exec: Rework (part 2), Philippe Mathieu-Daudé, 2024/04/18
- [PATCH 01/24] exec: Declare MMUAccessType type in 'mmu-access-type.h' header, Philippe Mathieu-Daudé, 2024/04/18
- [PATCH 02/24] exec: Declare CPUBreakpoint/CPUWatchpoint type in 'breakpoint.h' header,
Philippe Mathieu-Daudé <=
- [PATCH 03/24] hw/core: Avoid including the full 'hw/core/cpu.h' in 'tcg-cpu-ops.h', Philippe Mathieu-Daudé, 2024/04/18
- [PATCH 04/24] exec: Restrict TCG specific declarations of 'cputlb.h', Philippe Mathieu-Daudé, 2024/04/18
- [PATCH 05/24] exec: Restrict 'cpu_ldst.h' to TCG accelerator, Philippe Mathieu-Daudé, 2024/04/18
- [PATCH 09/24] physmem: Restrict TCG CPU IOTLB code to TCG accel, Philippe Mathieu-Daudé, 2024/04/18