[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PATCH 08/24] physmem: Move TCG CPU IOTLB methods around
From: |
Philippe Mathieu-Daudé |
Subject: |
[PATCH 08/24] physmem: Move TCG CPU IOTLB methods around |
Date: |
Thu, 18 Apr 2024 21:25:07 +0200 |
The next commit will restrict TCG specific code in physmem.c
using some #ifdef'ry. In order to keep it simple, move
iotlb_to_section() and memory_region_section_get_iotlb()
around close together.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
system/physmem.c | 50 ++++++++++++++++++++++++------------------------
1 file changed, 25 insertions(+), 25 deletions(-)
diff --git a/system/physmem.c b/system/physmem.c
index dd7b222942..cf6334f3a3 100644
--- a/system/physmem.c
+++ b/system/physmem.c
@@ -736,6 +736,31 @@ translate_fail:
return &d->map.sections[PHYS_SECTION_UNASSIGNED];
}
+MemoryRegionSection *iotlb_to_section(CPUState *cpu,
+ hwaddr index, MemTxAttrs attrs)
+{
+ int asidx = cpu_asidx_from_attrs(cpu, attrs);
+ CPUAddressSpace *cpuas = &cpu->cpu_ases[asidx];
+ AddressSpaceDispatch *d = cpuas->memory_dispatch;
+ int section_index = index & ~TARGET_PAGE_MASK;
+ MemoryRegionSection *ret;
+
+ assert(section_index < d->map.sections_nb);
+ ret = d->map.sections + section_index;
+ assert(ret->mr);
+ assert(ret->mr->ops);
+
+ return ret;
+}
+
+/* Called from RCU critical section */
+hwaddr memory_region_section_get_iotlb(CPUState *cpu,
+ MemoryRegionSection *section)
+{
+ AddressSpaceDispatch *d = flatview_to_dispatch(section->fv);
+ return section - d->map.sections;
+}
+
void cpu_address_space_init(CPUState *cpu, int asidx,
const char *prefix, MemoryRegion *mr)
{
@@ -957,14 +982,6 @@ bool
cpu_physical_memory_snapshot_get_dirty(DirtyBitmapSnapshot *snap,
return false;
}
-/* Called from RCU critical section */
-hwaddr memory_region_section_get_iotlb(CPUState *cpu,
- MemoryRegionSection *section)
-{
- AddressSpaceDispatch *d = flatview_to_dispatch(section->fv);
- return section - d->map.sections;
-}
-
static int subpage_register(subpage_t *mmio, uint32_t start, uint32_t end,
uint16_t section);
static subpage_t *subpage_init(FlatView *fv, hwaddr base);
@@ -2434,23 +2451,6 @@ static uint16_t dummy_section(PhysPageMap *map, FlatView
*fv, MemoryRegion *mr)
return phys_section_add(map, §ion);
}
-MemoryRegionSection *iotlb_to_section(CPUState *cpu,
- hwaddr index, MemTxAttrs attrs)
-{
- int asidx = cpu_asidx_from_attrs(cpu, attrs);
- CPUAddressSpace *cpuas = &cpu->cpu_ases[asidx];
- AddressSpaceDispatch *d = cpuas->memory_dispatch;
- int section_index = index & ~TARGET_PAGE_MASK;
- MemoryRegionSection *ret;
-
- assert(section_index < d->map.sections_nb);
- ret = d->map.sections + section_index;
- assert(ret->mr);
- assert(ret->mr->ops);
-
- return ret;
-}
-
static void io_mem_init(void)
{
memory_region_init_io(&io_mem_unassigned, NULL, &unassigned_mem_ops, NULL,
--
2.41.0
- [PATCH 03/24] hw/core: Avoid including the full 'hw/core/cpu.h' in 'tcg-cpu-ops.h', (continued)
- [PATCH 03/24] hw/core: Avoid including the full 'hw/core/cpu.h' in 'tcg-cpu-ops.h', Philippe Mathieu-Daudé, 2024/04/18
- [PATCH 04/24] exec: Restrict TCG specific declarations of 'cputlb.h', Philippe Mathieu-Daudé, 2024/04/18
- [PATCH 05/24] exec: Restrict 'cpu_ldst.h' to TCG accelerator, Philippe Mathieu-Daudé, 2024/04/18
- [PATCH 09/24] physmem: Restrict TCG CPU IOTLB code to TCG accel, Philippe Mathieu-Daudé, 2024/04/18
- [PATCH 06/24] exec: Have guest_addr_valid() methods take abi_ptr/size_t arguments, Philippe Mathieu-Daudé, 2024/04/18
- [PATCH 08/24] physmem: Move TCG CPU IOTLB methods around,
Philippe Mathieu-Daudé <=
- [PATCH 07/24] exec: Un-inline tlb_vaddr_to_host() and declare it in 'exec/cputlb.h', Philippe Mathieu-Daudé, 2024/04/18
- [PATCH 10/24] exec: Reduce tlb_set_dirty() declaration scope, Philippe Mathieu-Daudé, 2024/04/18
- [PATCH 11/24] exec: Move tlb_reset_dirty*() declarations to 'exec/cputlb.h', Philippe Mathieu-Daudé, 2024/04/18
- [PATCH 12/24] exec: Move CPUTLBEntry helpers to cputlb.c, Philippe Mathieu-Daudé, 2024/04/18