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[RFC PATCH 0/2] target/riscv: Add support for machine specific pmu's eve
From: |
Alexei Filippov |
Subject: |
[RFC PATCH 0/2] target/riscv: Add support for machine specific pmu's events |
Date: |
Tue, 10 Sep 2024 20:47:45 +0300 |
Following original patch [1] here's a patch with support of machine
specific pmu events and PoC with initial support for sifive_u's HPM.
== Test scenarios ==
So, I tested this patches on current Linux master with perf.
something like `perf stat -e branch-misses perf bench mem memcpy` works
just fine, also 'perf record -e branch-misses perf bench mem memcpy'
collect samples just fine and `perf report` works.
== ToDos / Limitations ==
Second patch is only inital sifive_u's HPM support, without any
filtering, events combining features or differrent counting
algorithm for different events. There are also no tests, but if you
have any suggestions about where I need to look to implement them, please
point me to.
== Changes since original patch ==
- Rebased to current master
[1]
https://lore.kernel.org/all/20240625144643.34733-1-alexei.filippov@syntacore.com/
Alexei Filippov (2):
target/riscv: Add support for machine specific pmu's events
hw/riscv/sifive_u.c: Add initial HPM support
hw/misc/meson.build | 1 +
hw/misc/sifive_u_pmu.c | 384 +++++++++++++++++++++++++++++++++
hw/riscv/sifive_u.c | 14 ++
include/hw/misc/sifive_u_pmu.h | 24 +++
target/riscv/cpu.c | 20 +-
target/riscv/cpu.h | 9 +
target/riscv/csr.c | 93 +++++---
target/riscv/pmu.c | 138 ++++++------
target/riscv/pmu.h | 19 +-
9 files changed, 599 insertions(+), 103 deletions(-)
create mode 100644 hw/misc/sifive_u_pmu.c
create mode 100644 include/hw/misc/sifive_u_pmu.h
--
2.34.1
- [RFC PATCH 0/2] target/riscv: Add support for machine specific pmu's events,
Alexei Filippov <=