Re: [PATCH v4 03/12] tcg/riscv: Add vset{i}vli and ld/st vec ops

qemu-riscv

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [PATCH v4 03/12] tcg/riscv: Add vset{i}vli and ld/st vec ops

From:	LIU Zhiwei
Subject:	Re: [PATCH v4 03/12] tcg/riscv: Add vset{i}vli and ld/st vec ops
Date:	Mon, 23 Sep 2024 12:46:24 +0800
User-agent:	Mozilla Thunderbird


On 2024/9/22 12:46, Richard Henderson wrote:

On 9/11/24 15:26, LIU Zhiwei wrote:
@@ -2129,6 +2389,7 @@ static void tcg_target_qemu_prologue(TCGContext*s)
    static void tcg_out_tb_start(TCGContext *s)
  {
+    s->riscv_cur_type = TCG_TYPE_COUNT;
      /* nothing to do */
  }
I recently realized that the vector config is call-clobbered.
We need this reset as well in tcg_out_call_int(),

OK.

and prepare_host_addr().
In prepare_host_addr, place the reset just after the two calls tonew_ldst_label().

As slow path will also cal tcg_out_call_init, can we only reset aftertcg_out_call_init?


Thanks,
Zhiwei

r~

[Prev in Thread]

Current Thread

[Next in Thread]

[PATCH v4 00/12] tcg/riscv: Add support for vector, LIU Zhiwei, 2024/09/11
- [PATCH v4 07/12] tcg/riscv: Implement vector neg ops, LIU Zhiwei, 2024/09/11
- [PATCH v4 03/12] tcg/riscv: Add vset{i}vli and ld/st vec ops, LIU Zhiwei, 2024/09/11
  - Re: [PATCH v4 03/12] tcg/riscv: Add vset{i}vli and ld/st vec ops, Richard Henderson, 2024/09/11
  - Re: [PATCH v4 03/12] tcg/riscv: Add vset{i}vli and ld/st vec ops, Richard Henderson, 2024/09/22
    - Re: [PATCH v4 03/12] tcg/riscv: Add vset{i}vli and ld/st vec ops, LIU Zhiwei <=
    - Re: [PATCH v4 03/12] tcg/riscv: Add vset{i}vli and ld/st vec ops, Richard Henderson, 2024/09/23
- [PATCH v4 05/12] tcg/riscv: Add support for basic vector opcodes, LIU Zhiwei, 2024/09/11
- [PATCH v4 08/12] tcg/riscv: Implement vector sat/mul ops, LIU Zhiwei, 2024/09/11
- [PATCH v4 09/12] tcg/riscv: Implement vector min/max ops, LIU Zhiwei, 2024/09/11
- [PATCH v4 10/12] tcg/riscv: Implement vector shi/s/v ops, LIU Zhiwei, 2024/09/11
  - Re: [PATCH v4 10/12] tcg/riscv: Implement vector shi/s/v ops, Richard Henderson, 2024/09/11
- [PATCH v4 11/12] tcg/riscv: Implement vector roti/v/x ops, LIU Zhiwei, 2024/09/11
  - Re: [PATCH v4 11/12] tcg/riscv: Implement vector roti/v/x ops, Richard Henderson, 2024/09/11
- [PATCH v4 12/12] tcg/riscv: Enable native vector support for TCG host, LIU Zhiwei, 2024/09/11
- [PATCH v4 01/12] util: Add RISC-V vector extension probe in cpuinfo, LIU Zhiwei, 2024/09/11

Prev by Date: Re: [PATCH 0/6] linux-user: move all remaining archs to syscalltbl
Next by Date: Re: [PATCH v4 03/12] tcg/riscv: Add vset{i}vli and ld/st vec ops
Previous by thread: Re: [PATCH v4 03/12] tcg/riscv: Add vset{i}vli and ld/st vec ops
Next by thread: Re: [PATCH v4 03/12] tcg/riscv: Add vset{i}vli and ld/st vec ops
Index(es):
- Date
- Thread