Re: [PATCH v5 0/9] Introduce SMP Cache Topology

[Zhao Liu]

Hi Philippe,

On Tue, Nov 05, 2024 at 10:54:07PM +0000, Philippe Mathieu-Daudé wrote:
> Date: Tue, 5 Nov 2024 22:54:07 +0000
> From: Philippe Mathieu-Daudé <philmd@linaro.org>
> Subject: Re: [PATCH v5 0/9] Introduce SMP Cache Topology
> 
> Hi Zhao,
> 
> On 1/11/24 09:33, Zhao Liu wrote:
> > Hi Paolo,
> > 
> > This is my v5, if you think it's okay, could this feature get the final
> > merge? (Before the 9.2 cycle ends) :-)
> 
> 
> > ---
> > Zhao Liu (8):
> >    i386/cpu: Don't enumerate the "invalid" CPU topology level
> >    hw/core: Make CPU topology enumeration arch-agnostic
> >    qapi/qom: Define cache enumeration and properties for machine
> >    hw/core: Check smp cache topology support for machine
> >    hw/core: Add a helper to check the cache topology level
> 
> Since the first patches aim to be generic I took the liberty to
> queue them via the hw-misc tree. The rest really belongs to the
> x86 tree.

Thank you! I'm glad I could catch the last train for version 9.2.

> >    i386/cpu: Support thread and module level cache topology
> >    i386/cpu: Update cache topology with machine's configuration
> >    i386/pc: Support cache topology in -machine for PC machine
> > Alireza Sanaee (1):
> >    i386/cpu: add has_caches flag to check smp_cache configuration
> >

I'll continue to push the rest during the merge window of v10.0.

Thanks,
Zhao