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[PULL 43/60] hw/i386: Fix comment style in topology.h
From: |
Philippe Mathieu-Daudé |
Subject: |
[PULL 43/60] hw/i386: Fix comment style in topology.h |
Date: |
Mon, 6 Nov 2023 12:03:15 +0100 |
From: Zhao Liu <zhao1.liu@intel.com>
For function comments in this file, keep the comment style consistent
with other files in the directory.
Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Yanan Wang <wangyanan55@huawei.com>
Reviewed-by: Xiaoyao Li <xiaoyao.li@Intel.com>
Reviewed-by: Babu Moger <babu.moger@amd.com>
Tested-by: Babu Moger <babu.moger@amd.com>
Tested-by: Yongwei Ma <yongwei.ma@intel.com>
Acked-by: Michael S. Tsirkin <mst@redhat.com>
Message-ID: <20231024090323.1859210-2-zhao1.liu@linux.intel.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
include/hw/i386/topology.h | 33 +++++++++++++++++----------------
1 file changed, 17 insertions(+), 16 deletions(-)
diff --git a/include/hw/i386/topology.h b/include/hw/i386/topology.h
index 380cb27ded..d4eeb7ab82 100644
--- a/include/hw/i386/topology.h
+++ b/include/hw/i386/topology.h
@@ -24,7 +24,8 @@
#ifndef HW_I386_TOPOLOGY_H
#define HW_I386_TOPOLOGY_H
-/* This file implements the APIC-ID-based CPU topology enumeration logic,
+/*
+ * This file implements the APIC-ID-based CPU topology enumeration logic,
* documented at the following document:
* Intel® 64 Architecture Processor Topology Enumeration
*
http://software.intel.com/en-us/articles/intel-64-architecture-processor-topology-enumeration/
@@ -41,7 +42,8 @@
#include "qemu/bitops.h"
-/* APIC IDs can be 32-bit, but beware: APIC IDs > 255 require x2APIC support
+/*
+ * APIC IDs can be 32-bit, but beware: APIC IDs > 255 require x2APIC support
*/
typedef uint32_t apic_id_t;
@@ -58,8 +60,7 @@ typedef struct X86CPUTopoInfo {
unsigned threads_per_core;
} X86CPUTopoInfo;
-/* Return the bit width needed for 'count' IDs
- */
+/* Return the bit width needed for 'count' IDs */
static unsigned apicid_bitwidth_for_count(unsigned count)
{
g_assert(count >= 1);
@@ -67,15 +68,13 @@ static unsigned apicid_bitwidth_for_count(unsigned count)
return count ? 32 - clz32(count) : 0;
}
-/* Bit width of the SMT_ID (thread ID) field on the APIC ID
- */
+/* Bit width of the SMT_ID (thread ID) field on the APIC ID */
static inline unsigned apicid_smt_width(X86CPUTopoInfo *topo_info)
{
return apicid_bitwidth_for_count(topo_info->threads_per_core);
}
-/* Bit width of the Core_ID field
- */
+/* Bit width of the Core_ID field */
static inline unsigned apicid_core_width(X86CPUTopoInfo *topo_info)
{
return apicid_bitwidth_for_count(topo_info->cores_per_die);
@@ -87,8 +86,7 @@ static inline unsigned apicid_die_width(X86CPUTopoInfo
*topo_info)
return apicid_bitwidth_for_count(topo_info->dies_per_pkg);
}
-/* Bit offset of the Core_ID field
- */
+/* Bit offset of the Core_ID field */
static inline unsigned apicid_core_offset(X86CPUTopoInfo *topo_info)
{
return apicid_smt_width(topo_info);
@@ -100,14 +98,14 @@ static inline unsigned apicid_die_offset(X86CPUTopoInfo
*topo_info)
return apicid_core_offset(topo_info) + apicid_core_width(topo_info);
}
-/* Bit offset of the Pkg_ID (socket ID) field
- */
+/* Bit offset of the Pkg_ID (socket ID) field */
static inline unsigned apicid_pkg_offset(X86CPUTopoInfo *topo_info)
{
return apicid_die_offset(topo_info) + apicid_die_width(topo_info);
}
-/* Make APIC ID for the CPU based on Pkg_ID, Core_ID, SMT_ID
+/*
+ * Make APIC ID for the CPU based on Pkg_ID, Core_ID, SMT_ID
*
* The caller must make sure core_id < nr_cores and smt_id < nr_threads.
*/
@@ -120,7 +118,8 @@ static inline apic_id_t
x86_apicid_from_topo_ids(X86CPUTopoInfo *topo_info,
topo_ids->smt_id;
}
-/* Calculate thread/core/package IDs for a specific topology,
+/*
+ * Calculate thread/core/package IDs for a specific topology,
* based on (contiguous) CPU index
*/
static inline void x86_topo_ids_from_idx(X86CPUTopoInfo *topo_info,
@@ -137,7 +136,8 @@ static inline void x86_topo_ids_from_idx(X86CPUTopoInfo
*topo_info,
topo_ids->smt_id = cpu_index % nr_threads;
}
-/* Calculate thread/core/package IDs for a specific topology,
+/*
+ * Calculate thread/core/package IDs for a specific topology,
* based on APIC ID
*/
static inline void x86_topo_ids_from_apicid(apic_id_t apicid,
@@ -155,7 +155,8 @@ static inline void x86_topo_ids_from_apicid(apic_id_t
apicid,
topo_ids->pkg_id = apicid >> apicid_pkg_offset(topo_info);
}
-/* Make APIC ID for the CPU 'cpu_index'
+/*
+ * Make APIC ID for the CPU 'cpu_index'
*
* 'cpu_index' is a sequential, contiguous ID for the CPU.
*/
--
2.41.0
- [PULL 34/60] target/ppc: Restrict KVM objects to system emulation, (continued)
- [PULL 34/60] target/ppc: Restrict KVM objects to system emulation, Philippe Mathieu-Daudé, 2023/11/06
- [PULL 35/60] target/ppc: Prohibit target specific KVM prototypes on user emulation, Philippe Mathieu-Daudé, 2023/11/06
- [PULL 36/60] target/nios2: Create IRQs *after* accelerator vCPU is realized, Philippe Mathieu-Daudé, 2023/11/06
- [PULL 37/60] target/alpha: Tidy up alpha_cpu_class_by_name(), Philippe Mathieu-Daudé, 2023/11/06
- [PULL 38/60] hw/cpu: Call object_class_is_abstract() once in cpu_class_by_name(), Philippe Mathieu-Daudé, 2023/11/06
- [PULL 39/60] exec/cpu: Have cpu_exec_realize() return a boolean, Philippe Mathieu-Daudé, 2023/11/06
- [PULL 40/60] hw/cpu: Clean up global variable shadowing, Philippe Mathieu-Daudé, 2023/11/06
- [PULL 41/60] hw/loader: Clean up global variable shadowing in rom_add_file(), Philippe Mathieu-Daudé, 2023/11/06
- [PULL 44/60] tests/unit: Rename test-x86-cpuid.c to test-x86-topo.c, Philippe Mathieu-Daudé, 2023/11/06
- [PULL 42/60] hw/isa/i82378: Propagate error if PC_SPEAKER device creation failed, Philippe Mathieu-Daudé, 2023/11/06
- [PULL 43/60] hw/i386: Fix comment style in topology.h,
Philippe Mathieu-Daudé <=
- [PULL 45/60] system/cpus: Fix CPUState.nr_cores' calculation, Philippe Mathieu-Daudé, 2023/11/06
- [PULL 46/60] hw/cpu: Update the comments of nr_cores and nr_dies, Philippe Mathieu-Daudé, 2023/11/06
- [PULL 47/60] hw/ide: reset: cancel async DMA operation before resetting state, Philippe Mathieu-Daudé, 2023/11/06
- [PULL 48/60] tests/qtest: ahci-test: add test exposing reset issue with pending callback, Philippe Mathieu-Daudé, 2023/11/06
- [PULL 49/60] hw/i2c: pmbus add support for block receive, Philippe Mathieu-Daudé, 2023/11/06
- [PULL 50/60] hw/i2c: pmbus: add vout mode bitfields, Philippe Mathieu-Daudé, 2023/11/06
- [PULL 51/60] hw/i2c: pmbus: add fan support, Philippe Mathieu-Daudé, 2023/11/06
- [PULL 53/60] hw/sensor: add ADM1266 device model, Philippe Mathieu-Daudé, 2023/11/06
- [PULL 52/60] hw/i2c: pmbus: add VCAP register, Philippe Mathieu-Daudé, 2023/11/06
- [PULL 55/60] hw/i2c: pmbus: immediately clear faults on request, Philippe Mathieu-Daudé, 2023/11/06