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[Stable-8.1.2 41/45] target/tricore: Fix RCPW/RRPW_INSERT insns for widt
From: |
Michael Tokarev |
Subject: |
[Stable-8.1.2 41/45] target/tricore: Fix RCPW/RRPW_INSERT insns for width = 0 |
Date: |
Wed, 4 Oct 2023 11:02:02 +0300 |
From: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
we would crash if width was 0 for these insns, as tcg_gen_deposit() is
undefined for that case. For TriCore, width = 0 is a mov from the src reg
to the dst reg, so we special case this here.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Message-ID: <20230828112651.522058-9-kbastian@mail.uni-paderborn.de>
(cherry picked from commit 23fa6f56b33f8fddf86ba4d027fb7d3081440cd9)
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
diff --git a/target/tricore/translate.c b/target/tricore/translate.c
index 1947733870..e7fa5a825a 100644
--- a/target/tricore/translate.c
+++ b/target/tricore/translate.c
@@ -5317,8 +5317,11 @@ static void decode_rcpw_insert(DisasContext *ctx)
}
break;
case OPC2_32_RCPW_INSERT:
+ /* tcg_gen_deposit_tl() does not handle the case of width = 0 */
+ if (width == 0) {
+ tcg_gen_mov_tl(cpu_gpr_d[r2], cpu_gpr_d[r1]);
/* if pos + width > 32 undefined result */
- if (pos + width <= 32) {
+ } else if (pos + width <= 32) {
temp = tcg_constant_i32(const4);
tcg_gen_deposit_tl(cpu_gpr_d[r2], cpu_gpr_d[r1], temp, pos, width);
}
@@ -6558,7 +6561,10 @@ static void decode_rrpw_extract_insert(DisasContext *ctx)
break;
case OPC2_32_RRPW_INSERT:
- if (pos + width <= 32) {
+ /* tcg_gen_deposit_tl() does not handle the case of width = 0 */
+ if (width == 0) {
+ tcg_gen_mov_tl(cpu_gpr_d[r3], cpu_gpr_d[r1]);
+ } else if (pos + width <= 32) {
tcg_gen_deposit_tl(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2],
pos, width);
}
diff --git a/tests/tcg/tricore/asm/macros.h b/tests/tcg/tricore/asm/macros.h
index b5087b5c97..51f6191ef2 100644
--- a/tests/tcg/tricore/asm/macros.h
+++ b/tests/tcg/tricore/asm/macros.h
@@ -161,6 +161,21 @@ test_ ## num:
\
insn DREG_CALC_RESULT, DREG_RS1, imm1, DREG_RS2, imm2; \
)
+#define TEST_D_DDII(insn, num, result, rs1, rs2, imm1, imm2) \
+ TEST_CASE(num, DREG_CALC_RESULT, result, \
+ LI(DREG_RS1, rs1); \
+ LI(DREG_RS2, rs2); \
+ rstv; \
+ insn DREG_CALC_RESULT, DREG_RS1, DREG_RS2, imm1, imm2; \
+ )
+
+#define TEST_D_DIII(insn, num, result, rs1, imm1, imm2, imm3)\
+ TEST_CASE(num, DREG_CALC_RESULT, result, \
+ LI(DREG_RS1, rs1); \
+ rstv; \
+ insn DREG_CALC_RESULT, DREG_RS1, imm1, imm2, imm3; \
+ )
+
#define TEST_E_ED(insn, num, res_hi, res_lo, rs1_hi, rs1_lo, rs2) \
TEST_CASE_E(num, res_lo, res_hi, \
LI(EREG_RS1_LO, rs1_lo); \
diff --git a/tests/tcg/tricore/asm/test_insert.S
b/tests/tcg/tricore/asm/test_insert.S
index d5fd2237e1..3978810121 100644
--- a/tests/tcg/tricore/asm/test_insert.S
+++ b/tests/tcg/tricore/asm/test_insert.S
@@ -6,4 +6,13 @@ _start:
# | | | | | | |
TEST_D_DIDI(insert, 1, 0x7fffffff, 0xffffffff, 0xa, 0x10, 0x8)
+# insn num result rs1 imm1 imm2 imm3
+# | | | | | | |
+ TEST_D_DIII(insert, 2, 0xd38fe370, 0xd38fe370, 0x4, 0x4 , 0x0)
+ TEST_D_DIII(insert, 3, 0xd38fe374, 0xd38fe370, 0x4, 0x0 , 0x4)
+
+# insn num result rs1 rs2 pos width
+# | | | | | | |
+ TEST_D_DDII(insert, 4, 0x03c1e53c, 0x03c1e53c, 0x45821385, 0x7 ,0x0)
+
TEST_PASSFAIL
--
2.39.2
- [Stable-8.1.2 30/45] migration: Remove redundant cleanup of postcopy_qemufile_src, (continued)
- [Stable-8.1.2 30/45] migration: Remove redundant cleanup of postcopy_qemufile_src, Michael Tokarev, 2023/10/04
- [Stable-8.1.2 28/45] migration: Fix possible races when shutting down the return path, Michael Tokarev, 2023/10/04
- [Stable-8.1.2 31/45] migration: Consolidate return path closing code, Michael Tokarev, 2023/10/04
- [Stable-8.1.2 33/45] migration: Move return path cleanup to main migration thread, Michael Tokarev, 2023/10/04
- [Stable-8.1.2 32/45] migration: Replace the return path retry logic, Michael Tokarev, 2023/10/04
- [Stable-8.1.2 34/45] softmmu: Use async_run_on_cpu in tcg_commit, Michael Tokarev, 2023/10/04
- [Stable-8.1.2 35/45] accel/tcg: Avoid load of icount_decr if unused, Michael Tokarev, 2023/10/04
- [Stable-8.1.2 39/45] accel/tcg: Always set CF_LAST_IO with CF_NOIRQ, Michael Tokarev, 2023/10/04
- [Stable-8.1.2 40/45] accel/tcg: Always require can_do_io, Michael Tokarev, 2023/10/04
- [Stable-8.1.2 43/45] esp: use correct type for esp_dma_enable() in sysbus_esp_gpio_demux(), Michael Tokarev, 2023/10/04
- [Stable-8.1.2 41/45] target/tricore: Fix RCPW/RRPW_INSERT insns for width = 0,
Michael Tokarev <=
- [Stable-8.1.2 38/45] accel/tcg: Improve setting of can_do_io at start of TB, Michael Tokarev, 2023/10/04
- [Stable-8.1.2 37/45] accel/tcg: Track current value of can_do_io in the TB, Michael Tokarev, 2023/10/04
- [Stable-8.1.2 42/45] optionrom: Remove build-id section, Michael Tokarev, 2023/10/04
- [Stable-8.1.2 36/45] accel/tcg: Hoist CF_MEMI_ONLY check outside translation loop, Michael Tokarev, 2023/10/04
- [Stable-8.1.2 45/45] scsi-disk: ensure that FORMAT UNIT commands are terminated, Michael Tokarev, 2023/10/04
- [Stable-8.1.2 44/45] esp: restrict non-DMA transfer length to that of available data, Michael Tokarev, 2023/10/04
- Re: [Stable-8.1.2 00/45] Patch Round-up for stable 8.1.2, freeze on 2023-10-14, Olaf Hering, 2023/10/04