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Re: [PATCH for-8.2] target/arm: Set IL bit for pauth, SVE access, BTI tr


From: Richard Henderson
Subject: Re: [PATCH for-8.2] target/arm: Set IL bit for pauth, SVE access, BTI trap syndromes
Date: Mon, 20 Nov 2023 08:08:20 -0800
User-agent: Mozilla Thunderbird

On 11/20/23 07:01, Peter Maydell wrote:
The syndrome register value always has an IL field at bit 25, which
is 0 for a trap on a 16 bit instruction, and 1 for a trap on a 32
bit instruction (or for exceptions which aren't traps on a known
instruction, like PC alignment faults). This means that our
syn_*() functions should always either take an is_16bit argument to
determine whether to set the IL bit, or else unconditionally set it.

We missed setting the IL bit for the syndrome for three kinds of trap:
  * an SVE access exception
  * a pointer authentication check failure
  * a BTI (branch target identification) check failure

All of these traps are AArch64 only, and so the instruction causing
the trap is always 64 bit. This means we can unconditionally set
the IL bit in the syn_*() function.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Cc: qemu-stable@nongnu.org
---
  target/arm/syndrome.h | 6 +++---
  1 file changed, 3 insertions(+), 3 deletions(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


r~



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