/* * $Id: intvects.c,v 1.9 2003/08/08 17:14:51 troth Exp $ * **************************************************************************** * * simulavr - A simulator for the Atmel AVR family of microcontrollers. * Copyright (C) 2001, 2002 Theodore A. Roth * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * **************************************************************************** */ #include #include #include #include "intvects.h" /******************************************************************************\ * * Interrupt Vector Tables: * * Since each device could have a different set of available interrupts, * the following tables map all interrupts to the addr to jump to when * the interrupt happens. If the device doesn't support an interrupt, * the table will contain a -1. Only one table will be installed into the * core for a given device. * \******************************************************************************/ /* * Vector Table for devices: * at90s1200 */ static IntVect vtab_at90s1200[] = { { "IRQ_RESET", 0x00, 0x00 }, { "IRQ_INT0", 0x01, 0x00 }, { NULL /* "IRQ_INT1" */, 0x00, 0x00 }, { NULL /* "IRQ_INT2" */, 0x00, 0x00 }, { NULL /* "IRQ_INT3" */, 0x00, 0x00 }, { NULL /* "IRQ_INT4" */, 0x00, 0x00 }, { NULL /* "IRQ_INT5" */, 0x00, 0x00 }, { NULL /* "IRQ_INT6" */, 0x00, 0x00 }, { NULL /* "IRQ_INT7" */, 0x00, 0x00 }, { NULL /* "IRQ_TIMER0_COMP" */, 0x00, 0x00 }, { "IRQ_TIMER0_OVF", 0x03, 0x00 }, { NULL /* "IRQ_TIMER1_CAPT" */, 0x00, 0x00 }, { NULL /* "IRQ_TIMER1_COMPA" */, 0x00, 0x00 }, { NULL /* "IRQ_TIMER1_COMPB" */, 0x00, 0x00 }, { NULL /* "IRQ_TIMER1_COMPC" */, 0x00, 0x00 }, { NULL /* "IRQ_TIMER1_OVF" */, 0x00, 0x00 }, { NULL /* "IRQ_TIMER2_COMP" */, 0x00, 0x00 }, { NULL /* "IRQ_TIMER2_OVF" */, 0x00, 0x00 }, { NULL /* "IRQ_TIMER3_CAPT" */, 0x00, 0x00 }, { NULL /* "IRQ_TIMER3_COMPA" */, 0x00, 0x00 }, { NULL /* "IRQ_TIMER3_COMPB" */, 0x00, 0x00 }, { NULL /* "IRQ_TIMER3_COMPC" */, 0x00, 0x00 }, { NULL /* "IRQ_TIMER3_OVF" */, 0x00, 0x00 }, { NULL /* "IRQ_SPI_STC" */, 0x00, 0x00 }, { NULL /* "IRQ_TWI" */, 0x00, 0x00 }, { NULL /* "IRQ_UART_RX" */, 0x00, 0x00 }, { NULL /* "IRQ_UART_UDRE" */, 0x00, 0x00 }, { NULL /* "IRQ_UART_TX" */, 0x00, 0x00 }, { NULL /* "IRQ_USART0_RX" */, 0x00, 0x00 }, { NULL /* "IRQ_USART0_UDRE" */, 0x00, 0x00 }, { NULL /* "IRQ_USART0_TX" */, 0x00, 0x00 }, { NULL /* "IRQ_USART1_RX" */, 0x00, 0x00 }, { NULL /* "IRQ_USART1_UDRE" */, 0x00, 0x00 }, { NULL /* "IRQ_USART1_TX" */, 0x00, 0x00 }, { NULL /* "IRQ_ADC" */, 0x00, 0x00 }, { "IRQ_ANA_COMP", 0x03, 0x00 }, { NULL /* "IRQ_EE_READY" */, 0x00, 0x00 }, { NULL /* "IRQ_SPM_READY" */, 0x00, 0x00 }, }; /* * Vector Table for devices: * at90s2313 */ static IntVect vtab_at90s2313[] = { { "IRQ_RESET", 0x00, 0x00 }, { "IRQ_INT0", 0x01, 0x00 }, { "IRQ_INT1", 0x02, 0x00 }, { NULL /* "IRQ_INT2" */, 0x00, 0x00 }, { NULL /* "IRQ_INT3" */, 0x00, 0x00 }, { NULL /* "IRQ_INT4" */, 0x00, 0x00 }, { NULL /* "IRQ_INT5" */, 0x00, 0x00 }, { NULL /* "IRQ_INT6" */, 0x00, 0x00 }, { NULL /* "IRQ_INT7" */, 0x00, 0x00 }, { NULL /* "IRQ_TIMER0_COMP" */, 0x00, 0x00 }, { "IRQ_TIMER0_OVF", 0x06, 0x00 }, { "IRQ_TIMER1_CAPT", 0x03, 0x00 }, { "IRQ_TIMER1_COMPA", 0x04, 0x00 }, { NULL /* "IRQ_TIMER1_COMPB" */, 0x00, 0x00 }, { NULL /* "IRQ_TIMER1_COMPC" */, 0x00, 0x00 }, { "IRQ_TIMER1_OVF", 0x05, 0x00 }, { NULL /* "IRQ_TIMER2_COMP" */, 0x00, 0x00 }, { NULL /* "IRQ_TIMER2_OVF" */, 0x00, 0x00 }, { NULL /* "IRQ_TIMER3_CAPT" */, 0x00, 0x00 }, { NULL /* "IRQ_TIMER3_COMPA" */, 0x00, 0x00 }, { NULL /* "IRQ_TIMER3_COMPB" */, 0x00, 0x00 }, { NULL /* "IRQ_TIMER3_COMPC" */, 0x00, 0x00 }, { NULL /* "IRQ_TIMER3_OVF" */, 0x00, 0x00 }, { NULL /* "IRQ_SPI_STC" */, 0x00, 0x00 }, { NULL /* "IRQ_TWI" */, 0x00, 0x00 }, { "IRQ_UART_RX", 0x07, 0x00 }, { "IRQ_UART_UDRE", 0x08, 0x00 }, { "IRQ_UART_TX", 0x09, 0x00 }, { NULL /* "IRQ_USART0_RX" */, 0x00, 0x00 }, { NULL /* "IRQ_USART0_UDRE" */, 0x00, 0x00 }, { NULL /* "IRQ_USART0_TX" */, 0x00, 0x00 }, { NULL /* "IRQ_USART1_RX" */, 0x00, 0x00 }, { NULL /* "IRQ_USART1_UDRE" */, 0x00, 0x00 }, { NULL /* "IRQ_USART1_TX" */, 0x00, 0x00 }, { NULL /* "IRQ_ADC" */, 0x00, 0x00 }, { "IRQ_ANA_COMP", 0x0a, 0x00 }, { NULL /* "IRQ_EE_READY" */, 0x00, 0x00 }, { NULL /* "IRQ_SPM_READY" */, 0x00, 0x00 }, }; /* * Vector Table for devices: * at90s4414, at90s8515 */ static IntVect vtab_at90s4414[] = { { "IRQ_RESET", 0x00, 0x00 }, { "IRQ_INT0", 0x01, 0x00 }, { "IRQ_INT1", 0x02, 0x00 }, { NULL /* "IRQ_INT2" */, 0x00, 0x00 }, { NULL /* "IRQ_INT3" */, 0x00, 0x00 }, { NULL /* "IRQ_INT4" */, 0x00, 0x00 }, { NULL /* "IRQ_INT5" */, 0x00, 0x00 }, { NULL /* "IRQ_INT6" */, 0x00, 0x00 }, { NULL /* "IRQ_INT7" */, 0x00, 0x00 }, { NULL /* "IRQ_TIMER0_COMP" */, 0x00, 0x00 }, { "IRQ_TIMER0_OVF", 0x07, 0x00 }, { "IRQ_TIMER1_CAPT", 0x03, 0x00 }, { "IRQ_TIMER1_COMPA", 0x04, 0x00 }, { "IRQ_TIMER1_COMPB", 0x05, 0x00 }, { NULL /* "IRQ_TIMER1_COMPC" */, 0x00, 0x00 }, { "IRQ_TIMER1_OVF", 0x06, 0x00 }, { NULL /* "IRQ_TIMER2_COMP" */, 0x00, 0x00 }, { NULL /* "IRQ_TIMER2_OVF" */, 0x00, 0x00 }, { NULL /* "IRQ_TIMER3_CAPT" */, 0x00, 0x00 }, { NULL /* "IRQ_TIMER3_COMPA" */, 0x00, 0x00 }, { NULL /* "IRQ_TIMER3_COMPB" */, 0x00, 0x00 }, { NULL /* "IRQ_TIMER3_COMPC" */, 0x00, 0x00 }, { NULL /* "IRQ_TIMER3_OVF" */, 0x00, 0x00 }, { "IRQ_SPI_STC", 0x08, 0x00 }, { NULL /* "IRQ_TWI" */, 0x00, 0x00 }, { "IRQ_UART_RX", 0x09, 0x00 }, { "IRQ_UART_UDRE", 0x0a, 0x00 }, { "IRQ_UART_TX", 0x0b, 0x00 }, { NULL /* "IRQ_USART0_RX" */, 0x00, 0x00 }, { NULL /* "IRQ_USART0_UDRE" */, 0x00, 0x00 }, { NULL /* "IRQ_USART0_TX" */, 0x00, 0x00 }, { NULL /* "IRQ_USART1_RX" */, 0x00, 0x00 }, { NULL /* "IRQ_USART1_UDRE" */, 0x00, 0x00 }, { NULL /* "IRQ_USART1_TX" */, 0x00, 0x00 }, { NULL /* "IRQ_ADC" */, 0x00, 0x00 }, { "IRQ_ANA_COMP", 0x0c, 0x00 }, { NULL /* "IRQ_EE_READY" */, 0x00, 0x00 }, { NULL /* "IRQ_SPM_READY" */, 0x00, 0x00 }, }; /* * Vector Table for devices: * atmega8 */ static IntVect vtab_atmega8[] = { { "IRQ_RESET", 0x00, 0x00 }, { "IRQ_INT0", 0x01, 0x00 }, { "IRQ_INT1", 0x02, 0x00 }, { NULL /* "IRQ_INT2" */, 0x00, 0x00 }, { NULL /* "IRQ_INT3" */, 0x00, 0x00 }, { NULL /* "IRQ_INT4" */, 0x00, 0x00 }, { NULL /* "IRQ_INT5" */, 0x00, 0x00 }, { NULL /* "IRQ_INT6",*/, 0x00, 0x00 }, { NULL /* "IRQ_INT7",*/, 0x00, 0x00 }, { NULL /* "IRQ_TIMER0_COMP"*/, 0x00, 0x00 }, { "IRQ_TIMER0_OVF", 0x09, 0x00 }, { "IRQ_TIMER1_CAPT", 0x05, 0x00 }, { "IRQ_TIMER1_COMPA", 0x06, 0x00 }, { "IRQ_TIMER1_COMPB", 0x07, 0x00 }, { NULL /* "IRQ_TIMER1_COMPC" */, 0x00, 0x00 }, { "IRQ_TIMER1_OVF", 0x08, 0x00 }, { "IRQ_TIMER2_COMP", 0x03, 0x00 }, { "IRQ_TIMER2_OVF", 0x04, 0x00 }, { NULL /* "IRQ_TIMER3_CAPT" */, 0x00, 0x00 }, { NULL /* "IRQ_TIMER3_COMPA" */, 0x00, 0x00 }, { NULL /* "IRQ_TIMER3_COMPB" */, 0x00, 0x00 }, { NULL /* "IRQ_TIMER3_COMPC" */, 0x00, 0x00 }, { NULL /* "IRQ_TIMER3_OVF" */, 0x00, 0x00 }, { "IRQ_SPI_STC", 0x0a, 0x00 }, { "IRQ_TWI", 0x11, 0x00 }, { "IRQ_UART_RX", 0x0b, 0x00 }, { "IRQ_UART_UDRE", 0x0c, 0x00 }, { "IRQ_UART_TX", 0x0d, 0x00 }, { NULL /* "IRQ_USART0_RX" */, 0x00, 0x00 }, { NULL /* "IRQ_USART0_UDRE" */, 0x00, 0x00 }, { NULL /* "IRQ_USART0_TX" */, 0x00, 0x00 }, { NULL /* "IRQ_USART1_RX" */, 0x00, 0x00 }, { NULL /* "IRQ_USART1_UDRE" */, 0x00, 0x00 }, { NULL /* "IRQ_USART1_TX" */, 0x00, 0x00 }, { "IRQ_ADC", 0x0e, 0x00 }, { "IRQ_ANA_COMP", 0x10, 0x00 }, { "IRQ_EE_READY", 0x0f, 0x00 }, { "IRQ_SPM_READY", 0x11, 0x00 }, }; /* * Vector Table for devices: * atmega16 */ static IntVect vtab_atmega16[] = { { "IRQ_RESET", 0x00, 0x00 }, { "IRQ_INT0", 0x02, 0x00 }, { "IRQ_INT1", 0x04, 0x00 }, { "IRQ_INT2", 0x24, 0x00 }, { NULL /* "IRQ_INT3" */, 0x00, 0x00 }, { NULL /* "IRQ_INT4" */, 0x00, 0x00 }, { NULL /* "IRQ_INT5" */, 0x00, 0x00 }, { NULL /* "IRQ_INT6",*/, 0x00, 0x00 }, { NULL /* "IRQ_INT7",*/, 0x00, 0x00 }, { "IRQ_TIMER0_COMP", 0x26, 0x00 }, { "IRQ_TIMER0_OVF", 0x12, 0x00 }, { "IRQ_TIMER1_CAPT", 0x0a, 0x00 }, { "IRQ_TIMER1_COMPA", 0x0c, 0x00 }, { "IRQ_TIMER1_COMPB", 0x0e, 0x00 }, { NULL /* "IRQ_TIMER1_COMPC" */, 0x00, 0x00 }, { "IRQ_TIMER1_OVF", 0x10, 0x00 }, { "IRQ_TIMER2_COMP", 0x06, 0x00 }, { "IRQ_TIMER2_OVF", 0x08, 0x00 }, { NULL /* "IRQ_TIMER3_CAPT" */, 0x00, 0x00 }, { NULL /* "IRQ_TIMER3_COMPA" */, 0x00, 0x00 }, { NULL /* "IRQ_TIMER3_COMPB" */, 0x00, 0x00 }, { NULL /* "IRQ_TIMER3_COMPC" */, 0x00, 0x00 }, { NULL /* "IRQ_TIMER3_OVF" */, 0x00, 0x00 }, { "IRQ_SPI_STC", 0x14, 0x00 }, { "IRQ_TWI", 0x22, 0x00 }, { "IRQ_UART_RX", 0x16, 0x00 }, { "IRQ_UART_UDRE", 0x18, 0x00 }, { "IRQ_UART_TX", 0x1a, 0x00 }, { NULL /* "IRQ_USART0_RX" */, 0x00, 0x00 }, { NULL /* "IRQ_USART0_UDRE" */, 0x00, 0x00 }, { NULL /* "IRQ_USART0_TX" */, 0x00, 0x00 }, { NULL /* "IRQ_USART1_RX" */, 0x00, 0x00 }, { NULL /* "IRQ_USART1_UDRE" */, 0x00, 0x00 }, { NULL /* "IRQ_USART1_TX" */, 0x00, 0x00 }, { "IRQ_ADC", 0x1c, 0x00 }, { "IRQ_ANA_COMP", 0x20, 0x00 }, { "IRQ_EE_READY", 0x1e, 0x00 }, { "IRQ_SPM_READY", 0x28, 0x00 }, }; /* * Vector Table for devices: * atmega103 */ static IntVect vtab_atmega103[] = { { "IRQ_RESET", 0x00, 0x00 }, { "IRQ_INT0", 0x02, 0x00 }, { "IRQ_INT1", 0x04, 0x00 }, { "IRQ_INT2", 0x06, 0x00 }, { "IRQ_INT3", 0x08, 0x00 }, { "IRQ_INT4", 0x0a, 0x00 }, { "IRQ_INT5", 0x0c, 0x00 }, { "IRQ_INT6", 0x0e, 0x00 }, { "IRQ_INT7", 0x10, 0x00 }, { "IRQ_TIMER0_COMP", 0x1e, 0x00 }, { "IRQ_TIMER0_OVF", 0x20, 0x00 }, { "IRQ_TIMER1_CAPT", 0x16, 0x00 }, { "IRQ_TIMER1_COMPA", 0x18, 0x00 }, { "IRQ_TIMER1_COMPB", 0x1a, 0x00 }, { NULL /* "IRQ_TIMER1_COMPC" */, 0x00, 0x00 }, { "IRQ_TIMER1_OVF", 0x1c, 0x00 }, { "IRQ_TIMER2_COMP", 0x12, 0x00 }, { "IRQ_TIMER2_OVF", 0x14, 0x00 }, { NULL /* "IRQ_TIMER3_CAPT" */, 0x00, 0x00 }, { NULL /* "IRQ_TIMER3_COMPA" */, 0x00, 0x00 }, { NULL /* "IRQ_TIMER3_COMPB" */, 0x00, 0x00 }, { NULL /* "IRQ_TIMER3_COMPC" */, 0x00, 0x00 }, { NULL /* "IRQ_TIMER3_OVF" */, 0x00, 0x00 }, { "IRQ_SPI_STC", 0x22, 0x00 }, { NULL /* "IRQ_TWI" */, 0x00, 0x00 }, { "IRQ_UART_RX", 0x24, 0x00 }, { "IRQ_UART_UDRE", 0x26, 0x00 }, { "IRQ_UART_TX", 0x28, 0x00 }, { NULL /* "IRQ_USART0_RX" */, 0x00, 0x00 }, { NULL /* "IRQ_USART0_UDRE" */, 0x00, 0x00 }, { NULL /* "IRQ_USART0_TX" */, 0x00, 0x00 }, { NULL /* "IRQ_USART1_RX" */, 0x00, 0x00 }, { NULL /* "IRQ_USART1_UDRE" */, 0x00, 0x00 }, { NULL /* "IRQ_USART1_TX" */, 0x00, 0x00 }, { "IRQ_ADC", 0x2a, 0x00 }, { "IRQ_ANA_COMP", 0x2e, 0x00 }, { "IRQ_EE_READY", 0x2c, 0x00 }, { NULL /* "IRQ_SPM_READY" */, 0x00, 0x00 }, }; /* * Vector Table for devices: * atmega128 */ /* Note that the mega128 has BOOTRST and IVSEL fuses which can be used to change the interrupt vectors. If used, the new vectors are just the following plus some Boot Reset Address. This could be implemented just as we vector to handler. */ /* Note that the vectors address for mega128 are two insn's. This is needed since they can use jmp (32-bit) insn at the vector address. */ static IntVect vtab_atmega128[] = { { "IRQ_RESET", 0x00, 0x00 }, { "IRQ_INT0", 0x02, 0x00 }, { "IRQ_INT1", 0x04, 0x00 }, { "IRQ_INT2", 0x06, 0x00 }, { "IRQ_INT3", 0x08, 0x00 }, { "IRQ_INT4", 0x0a, 0x00 }, { "IRQ_INT5", 0x0c, 0x00 }, { "IRQ_INT6", 0x0e, 0x00 }, { "IRQ_INT7", 0x10, 0x00 }, { "IRQ_TIMER0_COMP", 0x1e, 0x00 }, { "IRQ_TIMER0_OVF", 0x20, 0x00 }, { "IRQ_TIMER1_CAPT", 0x16, 0x00 }, { "IRQ_TIMER1_COMPA", 0x18, 0x00 }, { "IRQ_TIMER1_COMPB", 0x1a, 0x00 }, { "IRQ_TIMER1_COMPC", 0x30, 0x00 }, { "IRQ_TIMER1_OVF", 0x1c, 0x00 }, { "IRQ_TIMER2_COMP", 0x12, 0x00 }, { "IRQ_TIMER2_OVF", 0x14, 0x00 }, { "IRQ_TIMER3_CAPT", 0x32, 0x00 }, { "IRQ_TIMER3_COMPA", 0x34, 0x00 }, { "IRQ_TIMER3_COMPB", 0x36, 0x00 }, { "IRQ_TIMER3_COMPC", 0x38, 0x00 }, { "IRQ_TIMER3_OVF", 0x3a, 0x00 }, { "IRQ_SPI_STC", 0x22, 0x00 }, { "IRQ_TWI", 0x42, 0x00 }, { NULL /* "IRQ_UART_RX" */, 0x00, 0x00 }, { NULL /* "IRQ_UART_UDRE" */, 0x00, 0x00 }, { NULL /* "IRQ_UART_TX" */, 0x00, 0x00 }, { "IRQ_USART0_RX", 0x24, 0x00 }, { "IRQ_USART0_UDRE", 0x26, 0x00 }, { "IRQ_USART0_TX", 0x28, 0x00 }, { "IRQ_USART1_RX", 0x3c, 0x00 }, { "IRQ_USART1_UDRE", 0x3e, 0x00 }, { "IRQ_USART1_TX", 0x40, 0x00 }, { "IRQ_ADC", 0x2a, 0x00 }, { "IRQ_ANA_COMP", 0x2e, 0x00 }, { "IRQ_EE_READY", 0x2c, 0x00 }, { "IRQ_SPM_READY", 0x44, 0x00 }, }; /* supports 355, 353, 351 */ static IntVect vtab_at43usb355[] = { { "IRQ_RESET", 0x00, 0x00 }, { "IRQ_INT0", 0x02, 0x00 }, { "IRQ_INT1", 0x04, 0x00 }, { NULL /* "IRQ_INT2" */, 0x00, 0x00 }, { NULL /* "IRQ_INT3" */, 0x00, 0x00 }, { NULL /* "IRQ_INT4" */, 0x00, 0x00 }, { NULL /* "IRQ_INT5" */, 0x00, 0x00 }, { NULL /* "IRQ_INT6",*/, 0x00, 0x00 }, { NULL /* "IRQ_INT7",*/, 0x00, 0x00 }, { "IRQ_TIMER0_COMP", 0x0e, 0x00 }, { NULL /* "IRQ_TIMER0_OVF" */, 0x00, 0x00 }, { "IRQ_TIMER1_CAPT", 0x06, 0x00 }, { "IRQ_TIMER1_COMPA", 0x08, 0x00 }, { "IRQ_TIMER1_COMPB", 0x0a, 0x00 }, { NULL /* "IRQ_TIMER1_COMPC" */, 0x00, 0x00 }, { "IRQ_TIMER1_OVF", 0x0c, 0x00 }, { NULL /* "IRQ_TIMER2_COMP" */, 0x00, 0x00 }, { NULL /* "IRQ_TIMER2_OVF" */, 0x00, 0x00 }, { NULL /* "IRQ_TIMER3_CAPT" */, 0x00, 0x00 }, { NULL /* "IRQ_TIMER3_COMPA" */, 0x00, 0x00 }, { NULL /* "IRQ_TIMER3_COMPB" */, 0x00, 0x00 }, { NULL /* "IRQ_TIMER3_COMPC" */, 0x00, 0x00 }, { NULL /* "IRQ_TIMER3_OVF" */, 0x00, 0x00 }, { "IRQ_SPI_STC", 0x10, 0x00 }, { NULL /* "IRQ_TWI" */, 0x00, 0x00 }, { NULL /* "IRQ_UART_RX" */, 0x16, 0x00 }, { NULL /* "IRQ_UART_UDRE" */, 0x18, 0x00 }, { NULL /* "IRQ_UART_TX" */, 0x1a, 0x00 }, { NULL /* "IRQ_USART0_RX" */, 0x00, 0x00 }, { NULL /* "IRQ_USART0_UDRE" */, 0x00, 0x00 }, { NULL /* "IRQ_USART0_TX" */, 0x00, 0x00 }, { NULL /* "IRQ_USART1_RX" */, 0x00, 0x00 }, { NULL /* "IRQ_USART1_UDRE" */, 0x00, 0x00 }, { NULL /* "IRQ_USART1_TX" */, 0x00, 0x00 }, { "IRQ_ADC", 0x16, 0x00 }, { "IRQ_ANA_COMP", 0x18, 0x00 }, { NULL /* "IRQ_EE_READY" */, 0x00, 0x00 }, { NULL /* "IRQ_SPM_READY" */, 0x00, 0x00 }, }; /* supports 320, 324, 325, 326 */ static IntVect vtab_at43usb320[] = { { "IRQ_RESET", 0x00, 0x00 }, { "IRQ_INT0", 0x02, 0x00 }, { "IRQ_INT1", 0x04, 0x00 }, { NULL /* "IRQ_INT2" */, 0x00, 0x00 }, { NULL /* "IRQ_INT3" */, 0x00, 0x00 }, { NULL /* "IRQ_INT4" */, 0x00, 0x00 }, { NULL /* "IRQ_INT5" */, 0x00, 0x00 }, { NULL /* "IRQ_INT6",*/, 0x00, 0x00 }, { NULL /* "IRQ_INT7",*/, 0x00, 0x00 }, { "IRQ_TIMER0_COMP", 0x0e, 0x00 }, { NULL /* "IRQ_TIMER0_OVF" */, 0x00, 0x00 }, { "IRQ_TIMER1_CAPT", 0x06, 0x00 }, { "IRQ_TIMER1_COMPA", 0x08, 0x00 }, { "IRQ_TIMER1_COMPB", 0x0a, 0x00 }, { NULL /* "IRQ_TIMER1_COMPC" */, 0x00, 0x00 }, { "IRQ_TIMER1_OVF", 0x0c, 0x00 }, { NULL /* "IRQ_TIMER2_COMP" */, 0x00, 0x00 }, { NULL /* "IRQ_TIMER2_OVF" */, 0x00, 0x00 }, { NULL /* "IRQ_TIMER3_CAPT" */, 0x00, 0x00 }, { NULL /* "IRQ_TIMER3_COMPA" */, 0x00, 0x00 }, { NULL /* "IRQ_TIMER3_COMPB" */, 0x00, 0x00 }, { NULL /* "IRQ_TIMER3_COMPC" */, 0x00, 0x00 }, { NULL /* "IRQ_TIMER3_OVF" */, 0x00, 0x00 }, { "IRQ_SPI_STC", 0x10, 0x00 }, { NULL /* "IRQ_TWI" */, 0x00, 0x00 }, { "IRQ_UART_RX" , 0x12, 0x00 }, { "IRQ_UART_UDRE" , 0x14, 0x00 }, { "IRQ_UART_TX" , 0x16, 0x00 }, { NULL /* "IRQ_USART0_RX" */, 0x00, 0x00 }, { NULL /* "IRQ_USART0_UDRE" */, 0x00, 0x00 }, { NULL /* "IRQ_USART0_TX" */, 0x00, 0x00 }, { NULL /* "IRQ_USART1_RX" */, 0x00, 0x00 }, { NULL /* "IRQ_USART1_UDRE" */, 0x00, 0x00 }, { NULL /* "IRQ_USART1_TX" */, 0x00, 0x00 }, { NULL /* "IRQ_ADC" */, 0x16, 0x00 }, { "IRQ_ANA_COMP", 0x18, 0x00 }, { NULL /* "IRQ_EE_READY" */, 0x00, 0x00 }, { NULL /* "IRQ_SPM_READY" */, 0x00, 0x00 }, }; /* * Vector Table Lookup List. * * Maps a _vector_table_name to a device vector table. */ IntVect *global_vtable_list[] = { vtab_at90s1200, vtab_at90s2313, vtab_at90s4414, vtab_atmega8, vtab_atmega16, vtab_atmega103, vtab_atmega128, vtab_at43usb355, vtab_at43usb320, NULL };