simulavr-devel
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: Will simulavr support the Windows platform?


From: Klaus
Subject: Re: Will simulavr support the Windows platform?
Date: Sun, 1 Nov 2020 09:35:16 +0100
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.3.1

Hi,



Am 31.10.20 um 15:59 schrieb Helge Kruse:
This sounds good. As Thomas K  writes a re-integrate of Windows support
is possible. I will look at your branch and probably we get a strategy
how to merge everything. Honestly my attemps are currently
work-in-progress and without a clear strategy. I will setup a fork repo
on github so that we can see how it can be sync'd.


Perfect! I also took a look on some other clones we see on the net.
Maybe we can integrate them also.


What version of Visual Studio do you use? I have VS2013 and VS2019
Community Edition available. This should be obscured by CMake, but I
would get a good feeling if we could share easier ideas.

I have no windows installation, so I can't check anything against
windows compilation.


* the console tracer is now working. The console tracer was dropped a
very long time ago and I have no idea why. I reenabled printing register
content, memory content, register names, timestamp, irq vector name and
a lot more.
I just needed the register content during a simulation and have just
added this part. Sounds like you did much more.

Yes, I enabled all features from the past. So you also have IO register
names, stack pointer and XYZ register "virtual" content back.
And you get the names of memory areas which access is going to or from.
Also reduced the number of printed symbols if there are multiple names
pointing to the same location.



* open drain simulation is working again
Honestly I don't know what's the topic.


It allows to connect to a simulated wire with OpenDrain functionality.
This can also be done much better with verilog, but I implemented that
long before verlog interface was added. As older simulations need that
feature, I bring it back.


I have a problem on the desk: I want to simulate the UART RX ISR. I
currently don't have any idea how I can prepare the UART registers and
trigger an interrupt at a give CPU cylce (or cycle range).
- Does your branch supports this in any way?
- Did I miss this feature in the main branch?

Getting interrupt handler called by receiving a byte on rx is working,
even if the complete interrupt timing and interrupt priority is broken
as I mentioned. But we can use the old implementation which was not
"simplified" and it will work as on the target hardware. This is on my
todo list. But for non accurate timing and cycle ordering it works.

You simply have to connect you UART rx pin to another UART tx or use the
tcl uart support. By doing this you get a GUI with a editor window where
you can type from you pc keyboard and all characters will be send to
your uart. This should work from scratch. Take a look on the examples
section! There is an LCD example, which also works now, ( LCD support
was fully broken by last versions ). There is also a simulated UART
transfer. Even if the avr code did not use irq, you have a wroking
environment for uart and can modify you avr code to use interrupts.

As we loose so many features and functionality in the past: Please take
care, run unit tests and for new features: write new ones :-)

In hope to get the functionality back and make simulavr fully working again!

Regards
 Klaus






reply via email to

[Prev in Thread] Current Thread [Next in Thread]