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[avr-chat] Mega128/jtagice problem.


From: Andy Warner
Subject: [avr-chat] Mega128/jtagice problem.
Date: Fri, 22 Jul 2005 23:20:40 -0500
User-agent: Mutt/1.2.5i

I have a project based on the mega128, and I'm having strange
problems when I use the jtag port for programming. The summary is that
it doesn't seem to come out of reset correctly after programming,
but the part is programmed correctly and if I then manually cause
a reset or power cycle the board it behaves correctly.

If I program via the ISP port, it works correctly also.

I am currently using a MK-I jtag-ice and avarice. When I crank
the debug up on avarice, it shows it sending an "x" packet after
the programming is complete, but the board does not appear to
come out of reset correctly.

The reset line on this board only goes to the mega128, no other parts.
TDI/TDO/TMS/TCK are not connected to any other components.

My JTAG port is connected as follows:

        JTAG Pin        Name            mega128 pin (TQFP pkg)
        1               TCK             57
        2               GND             GND
        3               TDO             55
        4               Vref            Vcc
        5               TMS             56
        6               Srst            20
        7               Vcc             Vcc
        8               Trst            N/C
        9               TDI             54
        10              GND             GND

Memory tells me that Srst is an input used sense whether reset has
been asserted, rather than an outpost to assert it. My 'scope tells me
that the JTAG-ICE does not assert reset that way.

The fuses are as follows: high 0x19, low 0x1f.

Here's the command issued to program the part:

        avarice -j /dev/ttyS0 -e -p -P atmega128 -f output.elf
        AVaRICE version 2.2.20040312, Feb  8 2005 10:03:12

        Defaulting JTAG bitrate to 1 MHz. Make sure that the target
        frequency is at least 4 MHz or you will likely encounter failures
        controlling the target.

        JTAG config starting.
        Hardware Version: 0xc0
        Software Version: 0x78
        Reported JTAG device ID: 0x9702
        Configured for device ID: 0x9702 atmega128 -- Matched with atmega128
        JTAG config complete.
        Erasing program memory.
        Erase complete.
        Downloading FLASH image to target.....................................

        Download complete.

Does this sound familiar to anyone ? I'm assuming the JTAG-ICE is
issuing the device reset command as opposed to pulling the reset line,
and am puzzled why the chip doesn't seem to come out of reset cleanly
after programming.
-- 
address@hidden

Andy Warner             Voice: (612) 801-8549   Fax: (208) 575-5634




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