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[avr-chat] Is it any method to avoid ADC start in idle mode?


From: Dmitry K.
Subject: [avr-chat] Is it any method to avoid ADC start in idle mode?
Date: Sat, 3 Jun 2006 16:51:46 +1100
User-agent: KMail/1.5

Hi.

For me it has appeared a surprise that it is impossible
to avoid start ADC at transition in a idle state (needed
to reduce power consumption). MCU is ATmega168 (and 48).
It was tryed:
  1. Disable ADC interrapt enable:  ADIE==0
  2. No clear ADC ready:  ADIE==0, ADIF==1
  3. (!) Auto Trigger Mode:  ADATE==1 (with timer source)
==> No results: ADC starts with each 'sleep' instruction.

Certainly, the disabling of interruption (ADIE=0) limits
quantity of starts, but it is no matter, when external
interruptions act in the casual manner. To stop ADC it is
impossible: it is switched off internal AREF.
   The most insulting, that in Auto Trigger mode it is
impossible to obtain a regular period.

I attach a small test of this. I shall be grateful,
if somebody will try on other ATmega. 

Thanks,
Dmitry.

Attachment: t_ademo.c
Description: Text Data


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