Re: [avr-gcc-list] AVR simulator and interrupts

[Joerg Wunsch]

"Klaus Rudolph" <address@hidden> wrote:

> That is not really a hang. The problem is that some instructions
> need more then one cpy cycle. The simulation was made for cycle
> exact calculation.  So if you step through the code sometimes you
> will step multiple times but nothing seems to be continued.

Well, this IMHO violates POLA (principle of least astonishment).  If
you run GDB on a hardware CPU, no matter how many cycles it takes the
CPU, a single step steps a single instruction, not a single cycle.
I'd assume this to also be the default for a simulator (the old
simulavr does it that way, too).

I can see your reasons, but suggest not making this the default since
it's merely a special case.  Of course, you need to properly account
for the multiple clock cycles internally (e. g. for shifting out data
through the SPI), no question, but I think the debugger's single-step
has always meant to be a single instruction.  (Only on true RISC CPUs,
this is exactly a single clock cycle.)

An option to the simulator for this would IMHO be better.

> I hope that bill give us the actual version the next days on the
> "homepage" :-). You know that we are actually move to savannah but
> please give us some time for the move and clean up some minor
> problems.

I still don't see why you can't take Ted Roth's offer, and just
continue the old simulavr project with your code.  What particular
reason is there to have two (opensource) programs called "simulavr"?
As far as I can see, your version is going to be a good improvement,
and you're actively maintaining it.

-- 
J"org Wunsch                                           Unix support engineer
address@hidden        http://www.interface-systems.de/~j/