Let me preface that I don't really know the internals of gcc that well
so I don't know the relative difficulty of implementing the following
optimizations. What follows are a few suggestions that came to my
attention on another list. Given a simple bit of code such as:
<snip>
The body of the handler looks very similar; there's not much to
improve on there. But check the prologue and the epilogue. Note a
couple of additional optimizations are possible that IAR takes
advantage of. Namely, registers that are not used are not pushed.
Note that GCC pushes __zero_reg__ and __tmp_reg__, neither of which
are (need to be) used (OK, __tmp_reg__ is used but it doesn't need to
be - see the next sentence). The second thing is that none of the
instructions in the interrupt handler actually changes the status
register, thus IAR doesn't push it either. The result is that IAR
gets a smaller and tighter interrupt handler.
It'd be really cool if the GCC optimizer could do that too :-)