[Commit-gnuradio] r4694 - gnuradio/trunk/usrp/fpga/toplevel/usrp_std

[eb]

Author: eb
Date: 2007-03-02 20:49:04 -0700 (Fri, 02 Mar 2007)
New Revision: 4694

Modified:
   gnuradio/trunk/usrp/fpga/toplevel/usrp_std/usrp_std.qsf
Log:
updated qsf file to Quartus 6.1.  No semantic changes

Modified: gnuradio/trunk/usrp/fpga/toplevel/usrp_std/usrp_std.qsf
===================================================================
--- gnuradio/trunk/usrp/fpga/toplevel/usrp_std/usrp_std.qsf     2007-03-02 
22:01:07 UTC (rev 4693)
+++ gnuradio/trunk/usrp/fpga/toplevel/usrp_std/usrp_std.qsf     2007-03-03 
03:49:04 UTC (rev 4694)
@@ -223,7 +223,7 @@
 set_global_assignment -name TOP_LEVEL_ENTITY usrp_std
 set_global_assignment -name VHDL_SHOW_LMF_MAPPING_MESSAGES OFF
 set_global_assignment -name USER_LIBRARIES "e:\\usrp\\fpga\\megacells"
-set_global_assignment -name AUTO_ENABLE_SMART_COMPILE On
+set_global_assignment -name AUTO_ENABLE_SMART_COMPILE ON
 
 # Fitter Assignments
 # ==================
@@ -314,7 +314,7 @@
 # ========================
 set_global_assignment -name HUB_ENTITY_NAME SLD_HUB
 set_global_assignment -name HUB_INSTANCE_NAME SLD_HUB_INST
-set_global_assignment -name ENABLE_SIGNALTAP Off
+set_global_assignment -name ENABLE_SIGNALTAP OFF
 
 # LogicLock Region Assignments
 # ============================
@@ -326,8 +326,8 @@
        # Timing Assignments
        # ==================
 set_global_assignment -name DUTY_CYCLE 50 -section_id SCLK
-       set_global_assignment -name FMAX_REQUIREMENT "1.0 MHz" -section_id SCLK
-       set_global_assignment -name 
INCLUDE_EXTERNAL_PIN_DELAYS_IN_FMAX_CALCULATIONS OFF -section_id SCLK
+set_global_assignment -name FMAX_REQUIREMENT "1 MHz" -section_id SCLK
+set_global_assignment -name INCLUDE_EXTERNAL_PIN_DELAYS_IN_FMAX_CALCULATIONS 
OFF -section_id SCLK
 
 # end CLOCK(SCLK)
 # ---------------
@@ -338,8 +338,8 @@
        # Timing Assignments
        # ==================
 set_global_assignment -name DUTY_CYCLE 50 -section_id master_clk
-       set_global_assignment -name FMAX_REQUIREMENT "64.0 MHz" -section_id 
master_clk
-       set_global_assignment -name 
INCLUDE_EXTERNAL_PIN_DELAYS_IN_FMAX_CALCULATIONS OFF -section_id master_clk
+set_global_assignment -name FMAX_REQUIREMENT "64 MHz" -section_id master_clk
+set_global_assignment -name INCLUDE_EXTERNAL_PIN_DELAYS_IN_FMAX_CALCULATIONS 
OFF -section_id master_clk
 
 # end CLOCK(master_clk)
 # ---------------------
@@ -350,8 +350,8 @@
        # Timing Assignments
        # ==================
 set_global_assignment -name DUTY_CYCLE 50 -section_id usbclk
-       set_global_assignment -name FMAX_REQUIREMENT "48.0 MHz" -section_id 
usbclk
-       set_global_assignment -name 
INCLUDE_EXTERNAL_PIN_DELAYS_IN_FMAX_CALCULATIONS OFF -section_id usbclk
+set_global_assignment -name FMAX_REQUIREMENT "48 MHz" -section_id usbclk
+set_global_assignment -name INCLUDE_EXTERNAL_PIN_DELAYS_IN_FMAX_CALCULATIONS 
OFF -section_id usbclk
 
 # end CLOCK(usbclk)
 # -----------------
@@ -361,9 +361,9 @@
 
        # Timing Assignments
        # ==================
-       set_instance_assignment -name CLOCK_SETTINGS SCLK -to SCLK
-       set_instance_assignment -name CLOCK_SETTINGS usbclk -to usbclk
-       set_instance_assignment -name CLOCK_SETTINGS master_clk -to master_clk
+set_instance_assignment -name CLOCK_SETTINGS SCLK -to SCLK
+set_instance_assignment -name CLOCK_SETTINGS usbclk -to usbclk
+set_instance_assignment -name CLOCK_SETTINGS master_clk -to master_clk
 
 # end ENTITY(usrp_std)
 # --------------------