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[Commit-gnuradio] r5113 - in gnuradio/branches/developers/thottelt: inba
From: |
thottelt |
Subject: |
[Commit-gnuradio] r5113 - in gnuradio/branches/developers/thottelt: inband/usrp/fpga/inband_lib simulations |
Date: |
Wed, 25 Apr 2007 15:25:00 -0600 (MDT) |
Author: thottelt
Date: 2007-04-25 15:24:59 -0600 (Wed, 25 Apr 2007)
New Revision: 5113
Modified:
gnuradio/branches/developers/thottelt/inband/usrp/fpga/inband_lib/usb_packet_fifo2.v
gnuradio/branches/developers/thottelt/simulations/usb_packet_fifo2_test.v
Log:
Modified:
gnuradio/branches/developers/thottelt/inband/usrp/fpga/inband_lib/usb_packet_fifo2.v
===================================================================
---
gnuradio/branches/developers/thottelt/inband/usrp/fpga/inband_lib/usb_packet_fifo2.v
2007-04-25 21:17:46 UTC (rev 5112)
+++
gnuradio/branches/developers/thottelt/inband/usrp/fpga/inband_lib/usb_packet_fifo2.v
2007-04-25 21:24:59 UTC (rev 5113)
@@ -1,7 +1,7 @@
`default_nettype none
module usb_packet_fifo2(reset, usb_clock, fpga_clock, write_enable,
write_data,
- read_enable, skip_packet, read_data, have_space, pkt_waiting) ;
+ read_enable, skip_packet, read_data, have_space, pkt_waiting,
tx_empty) ;
/* Module parameters */
parameter LOG2_N = 2 ;
@@ -17,6 +17,7 @@
output wire [WIDTH-1:0] read_data ;
output wire have_space ;
output wire pkt_waiting ;
+ output wire tx_empty;
/* Variable for generate statement */
@@ -46,6 +47,9 @@
/* Assign the read_data to the output of the currently selected FIFO */
assign read_data = fifo_rdata[fifo_rselect] ;
+ /* Nand over all fifo_rfull flags */
+ assign tx_empty = (fifo_rfull == 0);
+
/* Increment fifo_rselect here */
always @(posedge fpga_clock)
begin
Modified:
gnuradio/branches/developers/thottelt/simulations/usb_packet_fifo2_test.v
===================================================================
--- gnuradio/branches/developers/thottelt/simulations/usb_packet_fifo2_test.v
2007-04-25 21:17:46 UTC (rev 5112)
+++ gnuradio/branches/developers/thottelt/simulations/usb_packet_fifo2_test.v
2007-04-25 21:24:59 UTC (rev 5113)
@@ -23,7 +23,7 @@
.fpga_clock (fpga_clock),
.have_space (have_space),
.pkt_waiting (pkt_waiting),
- .tx_empty (tx_empty),
+ //.tx_empty (tx_empty),
.write_enable (write_enable),
.skip_packet (skip_enable),
.read_data (read_data),
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