[Commit-gnuradio] r5916 - gnuradio/branches/developers/matt/u2f/control_lib

[matt]

Author: matt
Date: 2007-07-05 18:49:26 -0600 (Thu, 05 Jul 2007)
New Revision: 5916

Modified:
   gnuradio/branches/developers/matt/u2f/control_lib/fifo_int_tb.v
Log:
new ports, fits new interface


Modified: gnuradio/branches/developers/matt/u2f/control_lib/fifo_int_tb.v
===================================================================
--- gnuradio/branches/developers/matt/u2f/control_lib/fifo_int_tb.v     
2007-07-05 23:34:34 UTC (rev 5915)
+++ gnuradio/branches/developers/matt/u2f/control_lib/fifo_int_tb.v     
2007-07-06 00:49:26 UTC (rev 5916)
@@ -17,35 +17,39 @@
 
    wire [31:0]            rd_dat_o;
    wire           rd_ready_o, rd_empty_o;
-   wire           rd_done_i = 0;
+   wire           rd_done_i = 0, rd_error_i = 0;
    reg                    rd_read_i;
 
    reg [31:0]     wr_dat_i;
    reg                    wr_write_i=0;
    wire           wr_ready_o, wr_full_o;
-   wire           wr_done_i = 0;
+   wire           wr_done_i = 0, wr_error_i = 0;
+
    
    fifo_int fifo_int
      (.clk(clk),.rst(rst),
       .firstline(firstline),.lastline(lastline),
-      .step(step),.read_go(read_go),.write_go(write_go),.done(),
+      .step(step),.read_go(read_go),.write_go(write_go),
+      .clear(),.done(),.error(),
    
       // Buffer Interface
       .en_o(en),.we_o(we),.addr_o(addr),
       .dat_to_buf(fifo2buf),.dat_from_buf(buf2fifo),
 
       // Write FIFO Interface
-      .wr_dat_i(wr_dat_i), .wr_write_i(wr_write_i), .wr_done_i(wr_done_i), 
.wr_ready_o(wr_ready_o), .wr_full_o(wr_full_o),
+      .wr_dat_i(wr_dat_i), .wr_write_i(wr_write_i), .wr_done_i(wr_done_i), 
.wr_error_i(wr_error_i), 
+      .wr_ready_o(wr_ready_o), .wr_full_o(wr_full_o),
    
       // Read FIFO Interface
-      .rd_dat_o(rd_dat_o), .rd_read_i(rd_read_i), .rd_done_i(rd_done_i), 
.rd_ready_o(rd_ready_o), .rd_empty_o(rd_empty_o)
+      .rd_dat_o(rd_dat_o), .rd_read_i(rd_read_i), .rd_done_i(rd_done_i), 
.rd_error_i(rd_error_i),
+      .rd_ready_o(rd_ready_o), .rd_empty_o(rd_empty_o)
       );
 
    reg                    ram_en, ram_we;
    reg [8:0]      ram_addr;
    reg [31:0]     ram_data;
    
-   buffer_2k buffer_2k
+   ram_2port #(.DWIDTH(32),.AWIDTH(9)) ram_2port
      (.clka(clk), .ena(ram_en), .wea(ram_we), .addra(ram_addr), 
.dia(ram_data), .doa(),
       .clkb(clk), .enb(en), .web(we), .addrb(addr), .dib(fifo2buf), 
.dob(buf2fifo)
       );