[Commit-gnuradio] r7400 - usrp2/trunk/fpga/models

[matt]

Author: matt
Date: 2008-01-11 01:44:13 -0700 (Fri, 11 Jan 2008)
New Revision: 7400

Modified:
   usrp2/trunk/fpga/models/adc_model.v
Log:
faster sims.  I got sick of waiting for the sine wave generator


Modified: usrp2/trunk/fpga/models/adc_model.v
===================================================================
--- usrp2/trunk/fpga/models/adc_model.v 2008-01-11 08:43:29 UTC (rev 7399)
+++ usrp2/trunk/fpga/models/adc_model.v 2008-01-11 08:44:13 UTC (rev 7400)
@@ -27,15 +27,23 @@
 
    real       scale = math.pow(2,13)-2;
    always @(posedge clk)
-     begin
-       if(adc_on_a)
-         adc_a_int <= $rtoi(math.round(math.sin(phase*math.MATH_2_PI)*scale)) ;
-       if(adc_on_b)
-         adc_b_int <= $rtoi(math.round(math.cos(phase*math.MATH_2_PI)*scale)) ;
-       if(phase > 1)
-         phase <= phase + freq - 1;
-       else
-         phase <= phase + freq;
-     end
+     if(rst)
+       begin
+         adc_a_int <= 0;
+         adc_b_int <= 0;
+       end
+     else 
+       begin
+         if(adc_on_a)
+           //adc_a_int <= 
$rtoi(math.round(math.sin(phase*math.MATH_2_PI)*scale)) ;
+           adc_a_int <= adc_a_int + 3;
+         if(adc_on_b)
+           adc_b_int <= adc_b_int - 7;
+         //adc_b_int <= 
$rtoi(math.round(math.cos(phase*math.MATH_2_PI)*scale)) ;
+         if(phase > 1)
+           phase <= phase + freq - 1;
+         else
+           phase <= phase + freq;
+       end
    
 endmodule // adc_model