[Commit-gnuradio] r9097 - usrp2/trunk/fpga/eth

[matt]

Author: matt
Date: 2008-07-31 20:25:41 -0600 (Thu, 31 Jul 2008)
New Revision: 9097

Modified:
   usrp2/trunk/fpga/eth/mac_rxfifo_int.v
Log:
pass fifo level information


Modified: usrp2/trunk/fpga/eth/mac_rxfifo_int.v
===================================================================
--- usrp2/trunk/fpga/eth/mac_rxfifo_int.v       2008-08-01 02:21:43 UTC (rev 
9096)
+++ usrp2/trunk/fpga/eth/mac_rxfifo_int.v       2008-08-01 02:25:41 UTC (rev 
9097)
@@ -15,7 +15,13 @@
    output wr_done_o,
    output wr_error_o,
    input wr_ready_i,
-   input wr_full_i);
+   input wr_full_i,
+
+   // FIFO Status
+   output [15:0] fifo_occupied,
+   output fifo_full,
+   output fifo_empty
+   );
   
    // Write side of short FIFO
    //   Inputs: full, Rx_mac_empty, Rx_mac_sop, Rx_mac_eop, Rx_mac_err, 
Rx_mac_data/BE
@@ -30,8 +36,12 @@
    shortfifo #(.WIDTH(35)) mac_rx_sfifo
      (.clk(clk),.rst(rst),.clear(0),
       
.datain({Rx_mac_sop,Rx_mac_eop,Rx_mac_err,Rx_mac_data}),.write(write),.full(full),
-      .dataout({sop_o,eop_o,error_o,wr_dat_o}),.read(read),.empty(empty) );
-
+      .dataout({sop_o,eop_o,error_o,wr_dat_o}),.read(read),.empty(empty),
+      .space(), .occupied(fifo_occupied[4:0]) );
+   assign fifo_occupied[15:5] = 0;
+   assign fifo_full = full;
+   assign fifo_empty = empty;
+   
    // Read side of short FIFO
    //    Inputs:    empty, dataout, wr_ready_i, wr_full_i
    //    Controls:  read, wr_dat_o, wr_write_o, wr_done_o, wr_error_o