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[Commit-gnuradio] [gnuradio] 136/148: Added set time and set time at nex
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[Commit-gnuradio] [gnuradio] 136/148: Added set time and set time at next pps. Removed the old sync pps commands, they dont make sense to use anymore. |
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Date: |
Mon, 15 Aug 2016 00:47:34 +0000 (UTC) |
This is an automated email from the git hooks/post-receive script.
nwest pushed a commit to annotated tag old_usrp_devel_udp
in repository gnuradio.
commit 74087d160930ebcc964232c0e86da4a558c20dc2
Author: Josh Blum <address@hidden>
Date: Mon Jan 18 20:02:04 2010 -0800
Added set time and set time at next pps.
Removed the old sync pps commands, they dont make sense to use anymore.
Replaced the mimo config with clock config.
The clock config handles the pps and the reference.
Modified the memory map and internal calls to reflect the fpga changes.
---
usrp2/firmware/apps/Makefile.am | 4 +-
usrp2/firmware/apps/app_common_v2.c | 73 ++++++---------
usrp2/firmware/apps/blink_leds2.c | 2 +-
usrp2/firmware/apps/test_phy_comm.c | 2 +-
usrp2/firmware/apps/timer_test.c | 12 +--
usrp2/firmware/include/Makefile.am | 4 +-
.../{usrp2_mimo_config.h => usrp2_clock_bits.h} | 15 ++-
usrp2/firmware/include/usrp2_eth_packet.h | 77 ++++++---------
usrp2/firmware/lib/clocks.c | 4 -
usrp2/firmware/lib/clocks.h | 4 +-
usrp2/firmware/lib/hal_io.h | 5 +-
usrp2/firmware/lib/memory_map.h | 81 ++++++----------
usrp2/firmware/lib/pic.c | 2 +-
usrp2/fpga/top/u2_core/u2_core.v | 4 +-
usrp2/include/usrp2/Makefile.am | 2 +-
usrp2/include/usrp2/clock_config.h | 62 ++++++++++++
usrp2/include/usrp2/mimo_config.h | 50 ----------
usrp2/include/usrp2/usrp2.h | 53 ++++++-----
usrp2/lib/control.h | 9 +-
usrp2/lib/usrp2.cc | 14 +--
usrp2/lib/usrp2_impl.cc | 104 ++++++++++++++-------
usrp2/lib/usrp2_impl.h | 8 +-
22 files changed, 294 insertions(+), 297 deletions(-)
diff --git a/usrp2/firmware/apps/Makefile.am b/usrp2/firmware/apps/Makefile.am
index 24093fd..9c35f38 100644
--- a/usrp2/firmware/apps/Makefile.am
+++ b/usrp2/firmware/apps/Makefile.am
@@ -27,7 +27,6 @@ noinst_PROGRAMS = \
can_i_sub \
echo \
hello \
- ibs_tx_test \
read_dbids \
set_hw_rev \
test1 \
@@ -55,7 +54,8 @@ nononono = \
serdes_txrx \
mimo_tx \
mimo_tx_slave \
- ibs_rx_test
+ ibs_rx_test \
+ ibs_tx_test
# tx_drop_SOURCES = tx_drop.c app_common.c
# tx_drop_rate_limited_SOURCES = tx_drop_rate_limited.c app_common.c
diff --git a/usrp2/firmware/apps/app_common_v2.c
b/usrp2/firmware/apps/app_common_v2.c
index 4718dd4..b629b8c 100644
--- a/usrp2/firmware/apps/app_common_v2.c
+++ b/usrp2/firmware/apps/app_common_v2.c
@@ -40,29 +40,37 @@ dbsm_t *ac_could_be_sending_to_eth;
static unsigned char exp_seqno __attribute__((unused)) = 0;
-static inline bool
-sync_to_pps(const op_generic_t *p)
-{
- timesync_regs->sync_on_next_pps = 1;
- //putstr("SYNC to PPS\n");
- return true;
-}
-
static bool
-sync_every_pps(const op_generic_t *p)
+set_time(const op_set_time_t *p)
{
- if (p->ok)
- timesync_regs->tick_control |= TSC_TRIGGER_EVERYPPS;
- else
- timesync_regs->tick_control &= ~TSC_TRIGGER_EVERYPPS;
-
+ printf("Setting time: secs %u, ticks %u\n", p->time_secs, p->time_ticks);
+ sr_time64->secs = p->time_secs;
+ sr_time64->ticks = p->time_ticks;
+ switch (p->type){
+ case OP_SET_TIME_TYPE_NOW:
+ sr_time64->imm = 1;
+ break;
+ case OP_SET_TIME_TYPE_PPS:
+ sr_time64->imm = 0;
+ break;
+ }
return true;
}
static inline bool
-config_mimo_cmd(const op_config_mimo_t *p)
+config_clock_cmd(const op_config_clock_t *p)
{
- clocks_mimo_config(p->flags);
+ //handle the 10 mhz ref source
+ clocks_mimo_config(p->flags & MC_REF_CLK_MASK);
+
+ //handle the pps config
+ uint32_t pps_flags = 0;
+ if (p->flags & MC_PPS_POLARITY_NEG) pps_flags |= 0x00 << 0;
+ if (p->flags & MC_PPS_POLARITY_POS) pps_flags |= 0x01 << 0;
+ if (p->flags & MC_PPS_SOURCE_SMA) pps_flags |= 0x00 << 1;
+ if (p->flags & MC_PPS_SOURCE_MIMO) pps_flags |= 0x01 << 1;
+ sr_time64->flags = pps_flags;
+
return true;
}
@@ -287,22 +295,6 @@ config_rx_v2_cmd(const op_config_rx_v2_t *p,
return r->len;
}
-static size_t
-read_time_cmd(const op_generic_t *p,
- void *reply_payload, size_t reply_payload_space)
-{
- op_read_time_reply_t *r = (op_read_time_reply_t *) reply_payload;
- if (reply_payload_space < sizeof(*r))
- return 0; // no room
-
- r->opcode = OP_READ_TIME_REPLY;
- r->len = sizeof(*r);
- r->rid = p->rid;
- r->time = timer_regs->time;
-
- return r->len;
-}
-
static void
fill_db_info(u2_db_info_t *p, const struct db_base *db)
{
@@ -489,21 +481,16 @@ handle_control_chan_frame(u2_eth_packet_t *pkt, size_t
len)
ok = ethernet_set_mac_addr(&((op_burn_mac_addr_t *)payload)->addr);
goto generic_reply;
- case OP_CONFIG_MIMO:
- ok = config_mimo_cmd((op_config_mimo_t *) payload);
+ case OP_CONFIG_CLOCK:
+ ok = config_clock_cmd((op_config_clock_t *) payload);
goto generic_reply;
- case OP_READ_TIME:
- subpktlen = read_time_cmd(gp, reply_payload, reply_payload_space);
- break;
-
case OP_DBOARD_INFO:
subpktlen = dboard_info_cmd(gp, reply_payload, reply_payload_space);
break;
- case OP_SYNC_TO_PPS:
- sync_to_pps((op_generic_t *) payload);
- ok = true;
+ case OP_SET_TIME:
+ ok = set_time((op_set_time_t *) payload);
goto generic_reply;
case OP_PEEK:
@@ -524,10 +511,6 @@ handle_control_chan_frame(u2_eth_packet_t *pkt, size_t len)
ok = true;
goto generic_reply;
- case OP_SYNC_EVERY_PPS:
- ok = sync_every_pps((op_generic_t *) payload);
- goto generic_reply;
-
case OP_GPIO_SET_DDR:
ok = true;
hal_gpio_set_ddr(((op_gpio_t *)payload)->bank,
diff --git a/usrp2/firmware/apps/blink_leds2.c
b/usrp2/firmware/apps/blink_leds2.c
index d4bd89a..13e78af 100644
--- a/usrp2/firmware/apps/blink_leds2.c
+++ b/usrp2/firmware/apps/blink_leds2.c
@@ -42,7 +42,7 @@ main(void)
u2_init();
putstr("blink_leds2\n");
- pic_register_handler(IRQ_TIMER, timer_handler);
+ pic_register_handler(IRQ_ONETIME, timer_handler);
hal_set_timeout(DELTA_T); // schedule next timeout
while(1){
diff --git a/usrp2/firmware/apps/test_phy_comm.c
b/usrp2/firmware/apps/test_phy_comm.c
index 7242c6f..d312ca4 100644
--- a/usrp2/firmware/apps/test_phy_comm.c
+++ b/usrp2/firmware/apps/test_phy_comm.c
@@ -92,7 +92,7 @@ main(void)
putstr("\n test_phy_comm\n");
- pic_register_handler(IRQ_TIMER, timer_handler);
+ pic_register_handler(IRQ_ONETIME, timer_handler);
hal_set_timeout(DELTA_T); // schedule timeout
// setup tx gpio bits for GPIOM_FPGA_1 -- fpga debug output
diff --git a/usrp2/firmware/apps/timer_test.c b/usrp2/firmware/apps/timer_test.c
index 7c1e464..44e80b5 100644
--- a/usrp2/firmware/apps/timer_test.c
+++ b/usrp2/firmware/apps/timer_test.c
@@ -21,7 +21,7 @@
#include "buffer_pool.h"
#include "pic.h"
#include "nonstdio.h"
-
+#include "hal_io.h"
#define DELTA_T 500 // 5 us (10ns per tick)
@@ -29,11 +29,10 @@
void
timer_handler(unsigned irq)
{
- int t = timer_regs->time;
- timer_regs->time = t + DELTA_T;
+ hal_set_timeout(DELTA_T);
putstr("Tick: ");
- puthex_nl(t);
+ puthex_nl(0);
}
int
@@ -44,10 +43,9 @@ main(void)
// setup timer
putstr("Setting up timer\n");
- pic_register_handler(IRQ_TIMER, timer_handler);
+ pic_register_handler(IRQ_ONETIME, timer_handler);
- int t = timer_regs->time;
- timer_regs->time = t + DELTA_T;
+ hal_set_timeout(DELTA_T);
while (1)
;
diff --git a/usrp2/firmware/include/Makefile.am
b/usrp2/firmware/include/Makefile.am
index 62f63fc..23dcb72 100644
--- a/usrp2/firmware/include/Makefile.am
+++ b/usrp2/firmware/include/Makefile.am
@@ -1,5 +1,5 @@
#
-# Copyright 2008 Free Software Foundation, Inc.
+# Copyright 2008, 2010 Free Software Foundation, Inc.
#
# This program is free software: you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
@@ -23,7 +23,7 @@ noinst_HEADERS = \
usrp2_fpga_regs.h \
usrp2_i2c_addr.h \
usrp2_mac_addr.h \
- usrp2_mimo_config.h \
+ usrp2_clock_bits.h \
usrp2_types.h \
vrt/bits.h \
vrt/types.h
diff --git a/usrp2/firmware/include/usrp2_mimo_config.h
b/usrp2/firmware/include/usrp2_clock_bits.h
similarity index 78%
rename from usrp2/firmware/include/usrp2_mimo_config.h
rename to usrp2/firmware/include/usrp2_clock_bits.h
index 1296751..76ded9d 100644
--- a/usrp2/firmware/include/usrp2_mimo_config.h
+++ b/usrp2/firmware/include/usrp2_clock_bits.h
@@ -1,6 +1,6 @@
/* -*- c -*- */
/*
- * Copyright 2008 Free Software Foundation, Inc.
+ * Copyright 2008, 2010 Free Software Foundation, Inc.
*
* This file is part of GNU Radio
*
@@ -18,8 +18,8 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*/
-#ifndef INCLUDED_USRP2_MIMO_CONFIG_H
-#define INCLUDED_USRP2_MIMO_CONFIG_H
+#ifndef INCLUDED_USRP2_CLOCK_BITS_H
+#define INCLUDED_USRP2_CLOCK_BITS_H
#define _MC_WE_LOCK 0x0001
#define _MC_MIMO_CLK_INPUT 0x0002 // else SMA
input
@@ -42,5 +42,12 @@
*/
#define MC_PROVIDE_CLK_TO_MIMO 0x0004
+#define MC_REF_CLK_MASK 0x0f
-#endif /* INCLUDED_USRP2_MIMO_CONFIG_H */
+#define MC_PPS_SOURCE_SMA (0x00 << 4)
+#define MC_PPS_SOURCE_MIMO (0x01 << 4)
+
+#define MC_PPS_POLARITY_NEG (0x00 << 5)
+#define MC_PPS_POLARITY_POS (0x01 << 5)
+
+#endif /* INCLUDED_USRP2_CLOCK_BITS_H */
diff --git a/usrp2/firmware/include/usrp2_eth_packet.h
b/usrp2/firmware/include/usrp2_eth_packet.h
index 231f9d2..1255736 100644
--- a/usrp2/firmware/include/usrp2_eth_packet.h
+++ b/usrp2/firmware/include/usrp2_eth_packet.h
@@ -21,7 +21,6 @@
#include "usrp2_cdefs.h"
#include "usrp2_mac_addr.h"
-#include "usrp2_mimo_config.h"
__U2_BEGIN_DECLS
@@ -58,33 +57,6 @@ typedef struct {
} __attribute__((packed)) u2_transport_hdr_t;
-/*
- * The fixed payload header of a USRP2 ethernet packet...
- *
- * Basically there's 1 word of flags and routing info, and 1 word
- * of timestamp that specifies when the data was received, or
- * when it should be transmitted. The data samples follow immediately.
- *
- * Transmit packets (from host to U2)
- *
- * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
- * | Chan | mbz |I|S|E|
- * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
- * | Timestamp |
- * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
- *
- *
- * Received packets (from U2 to host)
- *
- * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
- * | Chan | mbz |
- * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
- * | Timestamp |
- * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
- *
- * mbz == must be zero
- */
-
/*!
* \brief consolidated packet: ethernet header + transport header
*/
@@ -106,8 +78,6 @@ typedef struct {
#define OP_ID_REPLY (OP_ID | OP_REPLY_BIT)
#define OP_BURN_MAC_ADDR 2
#define OP_BURN_MAC_ADDR_REPLY (OP_BURN_MAC_ADDR | OP_REPLY_BIT)
-#define OP_READ_TIME 3 // What time is it? (100 MHz
counter)
-#define OP_READ_TIME_REPLY (OP_READ_TIME | OP_REPLY_BIT)
#define OP_CONFIG_RX_V2 4
#define OP_CONFIG_RX_REPLY_V2 (OP_CONFIG_RX_V2 | OP_REPLY_BIT)
#define OP_CONFIG_TX_V2 5
@@ -116,12 +86,10 @@ typedef struct {
#define OP_START_RX_STREAMING_REPLY (OP_START_RX_STREAMING |
OP_REPLY_BIT)
#define OP_STOP_RX 7
#define OP_STOP_RX_REPLY (OP_STOP_RX | OP_REPLY_BIT)
-#define OP_CONFIG_MIMO 8
-#define OP_CONFIG_MIMO_REPLY (OP_CONFIG_MIMO | OP_REPLY_BIT)
+#define OP_CONFIG_CLOCK 8
+#define OP_CONFIG_CLOCK_REPLY (OP_CONFIG_CLOCK | OP_REPLY_BIT)
#define OP_DBOARD_INFO 9
#define OP_DBOARD_INFO_REPLY (OP_DBOARD_INFO | OP_REPLY_BIT)
-#define OP_SYNC_TO_PPS 10
-#define OP_SYNC_TO_PPS_REPLY (OP_SYNC_TO_PPS | OP_REPLY_BIT)
#define OP_PEEK 11
#define OP_PEEK_REPLY (OP_PEEK | OP_REPLY_BIT)
#define OP_POKE 12
@@ -132,8 +100,6 @@ typedef struct {
#define OP_SET_RX_LO_OFFSET_REPLY (OP_SET_RX_LO_OFFSET | OP_REPLY_BIT)
#define OP_RESET_DB 15
#define OP_RESET_DB_REPLY (OP_RESET_DB | OP_REPLY_BIT)
-#define OP_SYNC_EVERY_PPS 16
-#define OP_SYNC_EVERY_PPS_REPLY (OP_SYNC_EVERY_PPS | OP_REPLY_BIT)
#define OP_GPIO_SET_DDR 17
#define OP_GPIO_SET_DDR_REPLY (OP_GPIO_SET_DDR | OP_REPLY_BIT)
#define OP_GPIO_SET_SELS 18
@@ -144,6 +110,8 @@ typedef struct {
#define OP_GPIO_WRITE_REPLY (OP_GPIO_WRITE | OP_REPLY_BIT)
#define OP_GPIO_STREAM 21
#define OP_GPIO_STREAM_REPLY (OP_GPIO_STREAM | OP_REPLY_BIT)
+#define OP_SET_TIME 22
+#define OP_SET_TIME_REPLY (OP_SET_TIME | OP_REPLY_BIT)
/*
* All subpackets are a multiple of 4 bytes long.
@@ -166,6 +134,23 @@ typedef struct {
} _AL4 op_generic_t;
/*!
+ * \brief Set the ticks and secs on a usrp2
+ */
+typedef struct {
+ uint8_t opcode;
+ uint8_t len;
+ uint8_t rid;
+ uint8_t type;
+ uint32_t time_secs;
+ uint32_t time_ticks;
+} _AL4 op_set_time_t;
+
+typedef enum {
+ OP_SET_TIME_TYPE_NOW,
+ OP_SET_TIME_TYPE_PPS
+} op_set_time_type_t;
+
+/*!
* \brief Reply info from a USRP2
*/
typedef struct {
@@ -196,15 +181,6 @@ typedef struct {
u2_mac_addr_t addr;
} _AL4 op_burn_mac_addr_t;
-typedef struct {
- uint8_t opcode;
- uint8_t len;
- uint8_t rid;
- uint8_t mbz;
- uint32_t time;
-} _AL4 op_read_time_reply_t;
-
-
/*!
* \brief Configure receiver
*/
@@ -297,15 +273,14 @@ typedef struct {
} _AL4 op_config_tx_reply_v2_t;
/*!
- * \brief Configure MIMO clocking, etc (uses generic reply)
+ * \brief Configure clocking, etc (uses generic reply)
*/
typedef struct {
uint8_t opcode;
uint8_t len;
uint8_t rid;
- uint8_t flags; // from usrp_mimo_config.h
-} op_config_mimo_t;
-
+ uint8_t flags;
+} op_config_clock_t;
/*!
* \brief High-level information about daughterboards
@@ -412,18 +387,18 @@ typedef union {
op_id_reply_t op_id_reply;
op_start_rx_streaming_t op_start_rx_streaming;
op_burn_mac_addr_t op_burn_mac_addr;
- op_read_time_reply_t op_read_time_reply;
op_config_rx_v2_t op_config_rx_v2;
op_config_rx_reply_v2_t op_config_rx_reply_v2;
op_config_tx_v2_t op_config_tx_v2;
op_config_tx_reply_v2_t op_config_tx_reply_v2;
- op_config_mimo_t op_config_mimo;
+ op_config_clock_t op_config_clock;
op_peek_t op_peek;
op_poke_t op_poke;
op_freq_t op_freq;
op_gpio_t op_gpio;
op_gpio_set_sels_t op_gpio_set_sels;
op_gpio_read_reply_t op_gpio_read_reply;
+ op_set_time_t op_set_time;
} u2_subpkt_t;
diff --git a/usrp2/firmware/lib/clocks.c b/usrp2/firmware/lib/clocks.c
index 0dbf3f9..d9d4fcd 100644
--- a/usrp2/firmware/lib/clocks.c
+++ b/usrp2/firmware/lib/clocks.c
@@ -44,10 +44,6 @@ clocks_init(void)
// Reg 7, Loss of reference detect, doesn't work yet, 0
ad9510_write_reg(0x5A, 0x01); // Update Regs
-
- // FIXME, probably need interface to this...
- timesync_regs->tick_control = 4;
-
// Primary clock configuration
clocks_mimo_config(MC_WE_DONT_LOCK);
diff --git a/usrp2/firmware/lib/clocks.h b/usrp2/firmware/lib/clocks.h
index 39a0893..4f63caa 100644
--- a/usrp2/firmware/lib/clocks.h
+++ b/usrp2/firmware/lib/clocks.h
@@ -1,6 +1,6 @@
/* -*- c++ -*- */
/*
- * Copyright 2008 Free Software Foundation, Inc.
+ * Copyright 2008, 2010 Free Software Foundation, Inc.
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -24,7 +24,7 @@
*/
#include <bool.h>
-#include <usrp2_mimo_config.h>
+#include <usrp2_clock_bits.h>
/*!
diff --git a/usrp2/firmware/lib/hal_io.h b/usrp2/firmware/lib/hal_io.h
index b6ae35b..f8ec617 100644
--- a/usrp2/firmware/lib/hal_io.h
+++ b/usrp2/firmware/lib/hal_io.h
@@ -106,10 +106,7 @@ void hal_toggle_leds(int mask);
static inline void
hal_set_timeout(int delta_ticks)
{
- int t = timer_regs->time + delta_ticks;
- if (t == 0) // kills timer
- t = 1;
- timer_regs->time = t;
+ sr_simple_timer->onetime = delta_ticks;
}
/*
diff --git a/usrp2/firmware/lib/memory_map.h b/usrp2/firmware/lib/memory_map.h
index be30949..fd45bdf 100644
--- a/usrp2/firmware/lib/memory_map.h
+++ b/usrp2/firmware/lib/memory_map.h
@@ -306,6 +306,7 @@ hwconfig_wishbone_divisor(void)
#define SR_RX_DSP 160
#define SR_RX_CTRL 176
#define SR_TIME64 192
+#define SR_SIMTIMER 198
#define SR_LAST 255
#define _SR_ADDR(sr) (MISC_OUTPUT_BASE + (sr) * sizeof(uint32_t))
@@ -537,10 +538,28 @@ typedef struct {
#define dsp_rx_regs ((dsp_rx_regs_t *) _SR_ADDR(SR_RX_DSP))
// ----------------------------------------------------------------
-// VITA49 64 bit time
+// VITA49 64 bit time (write only)
+ /*!
+ * \brief Time 64 flags
+ *
+ * <pre>
+ *
+ * 3 2 1
+ * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
+ * +-----------------------------------------------------------+-+-+
+ * | |S|P|
+ * +-----------------------------------------------------------+-+-+
+ *
+ * P - PPS edge selection (0=negedge, 1=posedge, default=0)
+ * S - Source (0=sma, 1=mimo, 0=default)
+ *
+ * </pre>
+ */
typedef struct {
volatile uint32_t secs; // value to set absolute secs to on next PPS
volatile uint32_t ticks; // value to set absolute ticks to on next PPS
+ volatile uint32_t flags; // flags - see chart above
+ volatile uint32_t imm; // set immediate (0=latch on next pps, 1=latch
immediate, default=0)
} sr_time64_t;
#define sr_time64 ((sr_time64_t *) _SR_ADDR(SR_TIME64))
@@ -610,7 +629,7 @@ typedef struct {
// Bit numbers (LSB == 0) that correpond to interrupts into PIC
#define IRQ_BUFFER 0 // buffer manager
-#define IRQ_TIMER 1
+#define IRQ_ONETIME 1
#define IRQ_SPI 2
#define IRQ_I2C 3
#define IRQ_PHY 4 // ethernet PHY
@@ -621,11 +640,12 @@ typedef struct {
#define IRQ_UART_TX 9
#define IRQ_SERDES 10
#define IRQ_CLKSTATUS 11
+#define IRQ_PERIODIC 12
#define IRQ_TO_MASK(x) (1 << (x))
#define PIC_BUFFER_INT IRQ_TO_MASK(IRQ_BUFFER)
-#define PIC_TIMER_INT IRQ_TO_MASK(IRQ_TIMER)
+#define PIC_ONETIME_INT IRQ_TO_MASK(IRQ_ONETIME)
#define PIC_SPI_INT IRQ_TO_MASK(IRQ_SPI)
#define PIC_I2C_INT IRQ_TO_MASK(IRQ_I2C)
#define PIC_PHY_INT IRQ_TO_MASK(IRQ_PHY)
@@ -646,16 +666,14 @@ typedef struct {
#define pic_regs ((pic_regs_t *) PIC_BASE)
-///////////////////////////////////////////////////
-// Timer, Slave 9
-
-#define TIMER_BASE 0xDC00
-
+// ----------------------------------------------------------------
+// WB_CLK_RATE is the time base for this
typedef struct {
- volatile uint32_t time; // R: current, W: set time to interrupt
-} timer_regs_t;
+ volatile uint32_t onetime; // Number of wb clk cycles till the onetime
interrupt
+ volatile uint32_t periodic; // Repeat rate of periodic interrupt
+} sr_simple_timer_t;
-#define timer_regs ((timer_regs_t *) TIMER_BASE)
+#define sr_simple_timer ((sr_simple_timer_t *) _SR_ADDR(SR_SIMTIMER))
///////////////////////////////////////////////////
// UART, Slave 10
@@ -691,47 +709,6 @@ typedef struct {
#define atr_regs ((atr_regs_t *) ATR_BASE)
///////////////////////////////////////////////////
-// Time Sync Controller, Slave 12
-#define TIMESYNC_BASE 0xE800
-
-typedef struct {
- /*!
- * \brief Time sync configuration.
- *
- * <pre>
- *
- * 3 2 1
- * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
- * +-----------------------------------------------------+-+-+-+-+-+
- * | |T|G|X|I|S|
- * +-----------------------------------------------------+-+-+-+-+-+
- *
- * S - Tick source (0 = free run, 1 = pps, default=0)
- * I - Tick interrupt enable (not implemented)
- * X - Use external sync source (default=1)
- * G - PPS edge selection (0=negedge, 1=posedge, default=0)
- * T - Trigger sync every pps edge (default=0)
- *
- * </pre>
- */
- volatile uint32_t tick_control;
- volatile uint32_t tick_interval;
- volatile uint32_t delta_time;
- volatile uint32_t sync_on_next_pps;
-} timesync_regs_t;
-
-#define timesync_regs ((timesync_regs_t *) TIMESYNC_BASE)
-
-#define TSC_SOURCE_PPS (1 << 0)
-//#define TSC_SOURCE_FREE_RUN (0 << 0)
-#define TSC_IENABLE (1 << 1)
-#define TSC_EXTSYNC (1 << 2)
-#define TSC_PPSEDGE_POS (1 << 3)
-//#define TSC_PPSEDGE_NEG (0 << 3)
-#define TSC_TRIGGER_EVERYPPS (1 << 4)
-//#define TSC_TRIGGER_ONCE (0 << 4)
-
-///////////////////////////////////////////////////
// SD Card SPI interface, Slave 13
// All regs are 8 bits wide, but are accessed as if they are 32 bits
diff --git a/usrp2/firmware/lib/pic.c b/usrp2/firmware/lib/pic.c
index 592a07a..4575bd7 100644
--- a/usrp2/firmware/lib/pic.c
+++ b/usrp2/firmware/lib/pic.c
@@ -44,7 +44,7 @@ pic_init(void)
// uP is level triggered
pic_regs->mask = ~0; // mask all interrupts
- pic_regs->edge_enable = PIC_TIMER_INT | PIC_PHY_INT;
+ pic_regs->edge_enable = PIC_ONETIME_INT | PIC_PHY_INT;
pic_regs->polarity = ~0 & ~PIC_PHY_INT; // rising edge
pic_regs->pending = ~0; // clear all pending ints
}
diff --git a/usrp2/fpga/top/u2_core/u2_core.v b/usrp2/fpga/top/u2_core/u2_core.v
index e384e2b..591c102 100644
--- a/usrp2/fpga/top/u2_core/u2_core.v
+++ b/usrp2/fpga/top/u2_core/u2_core.v
@@ -630,7 +630,7 @@ module u2_core
//
///////////////////////////////////////////////////////////////////////////////////
// SERDES
-/*
+
serdes #(.TXFIFOSIZE(9),.RXFIFOSIZE(9)) serdes
(.clk(dsp_clk),.rst(dsp_rst),
.ser_tx_clk(ser_tx_clk),.ser_t(ser_t),.ser_tklsb(ser_tklsb),.ser_tkmsb(ser_tkmsb),
@@ -640,7 +640,7 @@ module u2_core
.tx_occupied(ser_tx_occ),.tx_full(ser_tx_full),.tx_empty(ser_tx_empty),
.rx_occupied(ser_rx_occ),.rx_full(ser_rx_full),.rx_empty(ser_rx_empty),
.serdes_link_up(serdes_link_up),.debug0(debug_serdes0),
.debug1(debug_serdes1) );
-*/
+
//
///////////////////////////////////////////////////////////////////////////////////
// External RAM Interface
diff --git a/usrp2/include/usrp2/Makefile.am b/usrp2/include/usrp2/Makefile.am
index 24184b9..53751b1 100644
--- a/usrp2/include/usrp2/Makefile.am
+++ b/usrp2/include/usrp2/Makefile.am
@@ -22,9 +22,9 @@ INCLUDES = $(STD_DEFINES_AND_INCLUDES) $(CPPUNIT_INCLUDES)
usrp2includedir = $(includedir)/usrp2
usrp2include_HEADERS = \
+ clock_config.h \
copiers.h \
data_handler.h \
- mimo_config.h \
rx_nop_handler.h \
strtod_si.h \
tune_result.h \
diff --git a/usrp2/include/usrp2/clock_config.h
b/usrp2/include/usrp2/clock_config.h
new file mode 100644
index 0000000..c3add13
--- /dev/null
+++ b/usrp2/include/usrp2/clock_config.h
@@ -0,0 +1,62 @@
+/* -*- c -*- */
+/*
+ * Copyright 2010 Free Software Foundation, Inc.
+ *
+ * This file is part of GNU Radio
+ *
+ * GNU Radio is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 3, or (at your option)
+ * any later version.
+ *
+ * GNU Radio is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ */
+#ifndef INCLUDED_USRP2_CLOCK_CONFIG_H
+#define INCLUDED_USRP2_CLOCK_CONFIG_H
+
+// FIXME: This duplicates the firmware usrp2_mimo_config.h file
+
+namespace usrp2 {
+
+ struct clock_config_t{
+ //10 mhz reference source (internal, sma, or mimo)
+ enum{
+ REF_INT,
+ REF_SMA,
+ REF_MIMO
+ } ref_source;
+
+ //10 mhz reference option
+ bool provide_ref_to_mimo;
+
+ //pps source (sma, or mimo)
+ enum{
+ PPS_SMA,
+ PPS_MIMO
+ } pps_source;
+
+ //pps polarity (negedge, or posedge)
+ enum{
+ PPS_NEG,
+ PPS_POS
+ } pps_polarity;
+
+ clock_config_t(void){
+ ref_source = REF_INT;
+ provide_ref_to_mimo = false;
+ pps_source = PPS_SMA;
+ pps_polarity = PPS_NEG;
+ }
+
+ };
+
+}
+
+#endif /* INCLUDED_USRP2_CLOCK_CONFIG_H */
diff --git a/usrp2/include/usrp2/mimo_config.h
b/usrp2/include/usrp2/mimo_config.h
deleted file mode 100644
index a1e038f..0000000
--- a/usrp2/include/usrp2/mimo_config.h
+++ /dev/null
@@ -1,50 +0,0 @@
-/* -*- c -*- */
-/*
- * Copyright 2008,2009 Free Software Foundation, Inc.
- *
- * This file is part of GNU Radio
- *
- * GNU Radio is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 3, or (at your option)
- * any later version.
- *
- * GNU Radio is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- */
-#ifndef INCLUDED_USRP2_MIMO_CONFIG_H
-#define INCLUDED_USRP2_MIMO_CONFIG_H
-
-// FIXME: This duplicates the firmware usrp2_mimo_config.h file
-
-namespace usrp2 {
-
- static const int _MC_WE_LOCK = 0x0001;
- static const int _MC_MIMO_CLK_INPUT = 0x0002; // else SMA
input
-
- /*
- * Derived masks (use these):
- *
- * We get our input from 1 of three places:
- * Our free running oscilator, our SMA connector, or from the MIMO connector
- */
- static const int MC_WE_DONT_LOCK = 0x0000;
- static const int MC_WE_LOCK_TO_SMA = (_MC_WE_LOCK | 0);
- static const int MC_WE_LOCK_TO_MIMO = (_MC_WE_LOCK | _MC_MIMO_CLK_INPUT);
-
- /*
- * Independent of the source of the clock, we may or may not drive our
- * clock onto the mimo connector. Note that there are dedicated clock
- * signals in each direction, so disaster doesn't occurs if we're
- * unnecessarily providing clock.
- */
- static const int MC_PROVIDE_CLK_TO_MIMO = 0x0004;
-}
-
-#endif /* INCLUDED_USRP2_MIMO_CONFIG_H */
diff --git a/usrp2/include/usrp2/usrp2.h b/usrp2/include/usrp2/usrp2.h
index e5bb3b0..33a88b3 100644
--- a/usrp2/include/usrp2/usrp2.h
+++ b/usrp2/include/usrp2/usrp2.h
@@ -25,7 +25,7 @@
#include <complex>
#include <vrt/rx_packet_handler.h>
#include <usrp2/tune_result.h>
-#include <usrp2/mimo_config.h>
+#include <usrp2/clock_config.h>
/*
* N.B., The interfaces described here are still in flux.
@@ -183,11 +183,14 @@ namespace usrp2 {
/*!
* Start streaming receive mode. USRP2 will send a continuous stream of
* DSP pipeline samples to host. Call rx_samples(...) to access.
- *
+ *
+ * The timestamp specifies a future time when the usrp2 will begin
streaming.
+ * If a time spec is not provided, it will default to doing a "stream now".
+ *
* \param items_per_frame Number of 32-bit items per frame.
- * \param time_spec When to start streaming (default == whenever)
+ * \param time_spec When to start streaming (default == now)
*/
- bool start_rx_streaming(unsigned int items_per_frame=0, const time_spec_t
*time_spec=new time_spec_t());
+ bool start_rx_streaming(unsigned int items_per_frame=0, const time_spec_t
&time_spec = time_spec_t());
/*!
* Stop streaming receive mode.
@@ -349,23 +352,15 @@ namespace usrp2 {
*/
/*!
- * \brief MIMO configuration
- *
- * \param flags from usrp2_mimo_config.h
- *
- * <pre>
- * one of these:
+ * \brief clock configuration
*
- * MC_WE_DONT_LOCK
- * MC_WE_LOCK_TO_SMA
- * MC_WE_LOCK_TO_MIMO
+ * Sets the source for the pps and reference.
+ * Set the polarity of the pps and other options.
+ * \see clock_config.h
*
- * and optionally this:
- *
- * MC_PROVIDE_CLK_TO_MIMO
- * </pre>
+ * \param clock_config the clock config options
*/
- bool config_mimo(int flags);
+ bool config_clock(const clock_config_t &clock_config);
//! Get frequency of master oscillator in Hz
@@ -412,14 +407,28 @@ namespace usrp2 {
bool burn_mac_addr(const std::string &new_addr);
/*!
- * Reset master time to 0 at next PPS edge
+ * \brief Set the time registers on the usrp2 (when the pps pulses).
+ * \param time_spec the seconds and ticks to set
+ *
+ * The new time will be latched on the next pps.
+ * The pps must be setup in the clock config.
+ *
+ * Using with a GPS example:
+ * Connect pps and reference to the usrp2 external inputs.
+ * Configure your gps to send a new timestamp over the serial terminal.
+ * When the host gets a new timestamp from the gps (absolute seconds),
+ * call set_time with (gps_seconds + 1) for the seconds and 0 for the
ticks.
+ * Set the ticks to something other than zero to correct for timing
issues.
*/
- bool sync_to_pps();
+ bool set_time_at_next_pps(const time_spec_t &time_spec);
/*!
- * Reset master time to 0 at every PPS edge
+ * \brief Set the time registers on the usrp2.
+ * \param time_spec the seconds and ticks to set
+ *
+ * The new time will be latched asap.
*/
- bool sync_every_pps(bool enable);
+ bool set_time(const time_spec_t &time_spec);
/*!
* Read memory from Wishbone bus as 32-bit words. Handles endian swapping
if needed.
diff --git a/usrp2/lib/control.h b/usrp2/lib/control.h
index 091b93f..9509a53 100644
--- a/usrp2/lib/control.h
+++ b/usrp2/lib/control.h
@@ -29,6 +29,11 @@ namespace usrp2 {
op_generic_t eop;
};
+ struct op_set_time_cmd {
+ op_set_time_t op;
+ op_generic_t eop;
+ };
+
/*!
* OP_CONFIG_RX_V2 command packet
*/
@@ -55,9 +60,9 @@ namespace usrp2 {
op_generic_t eop;
};
- struct op_config_mimo_cmd
+ struct op_config_clock_cmd
{
- op_config_mimo_t op;
+ op_config_clock_t op;
op_generic_t eop;
};
diff --git a/usrp2/lib/usrp2.cc b/usrp2/lib/usrp2.cc
index e3b1904..6a86502 100644
--- a/usrp2/lib/usrp2.cc
+++ b/usrp2/lib/usrp2.cc
@@ -251,7 +251,7 @@ namespace usrp2 {
}
bool
- usrp2::start_rx_streaming(unsigned int items_per_frame, const time_spec_t
*time_spec)
+ usrp2::start_rx_streaming(unsigned int items_per_frame, const time_spec_t
&time_spec)
{
return d_impl->start_rx_streaming(items_per_frame, time_spec);
}
@@ -387,9 +387,9 @@ namespace usrp2 {
// miscellaneous methods
bool
- usrp2::config_mimo(int flags)
+ usrp2::config_clock(const clock_config_t &clock_config)
{
- return d_impl->config_mimo(flags);
+ return d_impl->config_clock(clock_config);
}
bool
@@ -434,15 +434,15 @@ namespace usrp2 {
}
bool
- usrp2::sync_to_pps()
+ usrp2::set_time_at_next_pps(const time_spec_t &time_spec)
{
- return d_impl->sync_to_pps();
+ return d_impl->set_time_at_next_pps(time_spec);
}
bool
- usrp2::sync_every_pps(bool enable)
+ usrp2::set_time(const time_spec_t &time_spec)
{
- return d_impl->sync_every_pps(enable);
+ return d_impl->set_time(time_spec);
}
std::vector<uint32_t>
diff --git a/usrp2/lib/usrp2_impl.cc b/usrp2/lib/usrp2_impl.cc
index 430f484..bdc8f1a 100644
--- a/usrp2/lib/usrp2_impl.cc
+++ b/usrp2/lib/usrp2_impl.cc
@@ -35,6 +35,7 @@
#include <stddef.h>
#include <assert.h>
#include <string.h>
+#include <usrp2_clock_bits.h>
static const int DEFAULT_RX_SCALE = 1024;
@@ -50,26 +51,23 @@ namespace usrp2 {
case OP_ID: return "OP_ID";
case OP_ID_REPLY: return "OP_ID_REPLY";
case OP_BURN_MAC_ADDR: return "OP_BURN_MAC_ADDR";
- case OP_READ_TIME: return "OP_READ_TIME";
- case OP_READ_TIME_REPLY: return "OP_READ_TIME_REPLY";
case OP_CONFIG_RX_V2: return "OP_CONFIG_RX_V2";
case OP_CONFIG_RX_REPLY_V2: return "OP_CONFIG_RX_REPLY_V2";
case OP_CONFIG_TX_V2: return "OP_CONFIG_TX_V2";
case OP_CONFIG_TX_REPLY_V2: return "OP_CONFIG_TX_REPLY_V2";
case OP_START_RX_STREAMING: return "OP_START_RX_STREAMING";
case OP_STOP_RX: return "OP_STOP_RX";
- case OP_CONFIG_MIMO: return "OP_CONFIG_MIMO";
+ case OP_CONFIG_CLOCK: return "OP_CONFIG_CLOCK";
case OP_DBOARD_INFO: return "OP_DBOARD_INFO";
case OP_DBOARD_INFO_REPLY: return "OP_DBOARD_INFO_REPLY";
- case OP_SYNC_TO_PPS: return "OP_SYNC_TO_PPS";
case OP_PEEK: return "OP_PEEK";
case OP_PEEK_REPLY: return "OP_PEEK_REPLY";
case OP_SET_TX_LO_OFFSET: return "OP_SET_TX_LO_OFFSET";
case OP_SET_TX_LO_OFFSET_REPLY: return "OP_SET_TX_LO_OFFSET_REPLY";
case OP_SET_RX_LO_OFFSET: return "OP_SET_RX_LO_OFFSET";
case OP_SET_RX_LO_OFFSET_REPLY: return "OP_SET_RX_LO_OFFSET_REPLY";
- case OP_SYNC_EVERY_PPS: return "OP_SYNC_EVERY_PPS";
- case OP_SYNC_EVERY_PPS_REPLY: return "OP_SYNC_EVERY_PPS_REPLY";
+ case OP_SET_TIME: return "OP_SET_TIME";
+ case OP_SET_TIME_REPLY: return "OP_SET_TIME_REPLY";
default:
char buf[64];
@@ -406,9 +404,9 @@ namespace usrp2 {
bool success = (ntohx(reply.ok) == 1);
return success;
}
-
+
bool
- usrp2::impl::start_rx_streaming(unsigned int items_per_frame, const
time_spec_t *time_spec)
+ usrp2::impl::start_rx_streaming(unsigned int items_per_frame, const
time_spec_t &time_spec)
{
//flush any old samples in the data transport
@@ -427,8 +425,8 @@ namespace usrp2 {
cmd.op.len = sizeof(cmd.op);
cmd.op.rid = d_next_rid++;
cmd.op.items_per_frame = htonl(items_per_frame);
- cmd.op.time_secs = time_spec->secs;
- cmd.op.time_ticks = time_spec->ticks;
+ cmd.op.time_secs = time_spec.secs;
+ cmd.op.time_ticks = time_spec.ticks;
cmd.eop.opcode = OP_EOP;
cmd.eop.len = sizeof(cmd.eop);
@@ -733,13 +731,51 @@ namespace usrp2 {
// ----------------------------------------------------------------
bool
- usrp2::impl::config_mimo(int flags)
+ usrp2::impl::config_clock(const clock_config_t &clock_config)
{
- op_config_mimo_cmd cmd;
+ uint8_t flags = 0;
+
+ //determine flags for the reference source
+ switch(clock_config.ref_source){
+ case clock_config_t::REF_INT:
+ flags |= MC_WE_DONT_LOCK;
+ break;
+ case clock_config_t::REF_SMA:
+ flags |= MC_WE_LOCK_TO_SMA;
+ break;
+ case clock_config_t::REF_MIMO:
+ flags |= MC_WE_LOCK_TO_MIMO;
+ break;
+ }
+
+ //determine flags for reference provider
+ flags |= (clock_config.provide_ref_to_mimo)? MC_PROVIDE_CLK_TO_MIMO : 0x00;
+
+ //determine flags for the pps source
+ switch(clock_config.pps_source){
+ case clock_config_t::PPS_SMA:
+ flags |= MC_PPS_SOURCE_SMA;
+ break;
+ case clock_config_t::PPS_MIMO:
+ flags |= MC_PPS_SOURCE_MIMO;
+ break;
+ }
+
+ //determine flags for the pps polarity
+ switch(clock_config.pps_source){
+ case clock_config_t::PPS_NEG:
+ flags |= MC_PPS_POLARITY_NEG;
+ break;
+ case clock_config_t::PPS_POS:
+ flags |= MC_PPS_POLARITY_POS;
+ break;
+ }
+
+ op_config_clock_cmd cmd;
op_generic_t reply;
memset(&cmd, 0, sizeof(cmd));
- cmd.op.opcode = OP_CONFIG_MIMO;
+ cmd.op.opcode = OP_CONFIG_CLOCK;
cmd.op.len = sizeof(cmd.op);
cmd.op.rid = d_next_rid++;
cmd.op.flags = flags;
@@ -853,46 +889,48 @@ namespace usrp2 {
return success;
}
-
bool
- usrp2::impl::sync_to_pps()
+ usrp2::impl::set_time_at_next_pps(const time_spec_t &time_spec)
{
- op_generic_cmd cmd;
- op_generic_t reply;
+ op_set_time_cmd cmd;
+ op_generic_t reply;
memset(&cmd, 0, sizeof(cmd));
- cmd.op.opcode = OP_SYNC_TO_PPS;
+ cmd.op.opcode = OP_SET_TIME;
cmd.op.len = sizeof(cmd.op);
cmd.op.rid = d_next_rid++;
- cmd.eop.opcode = OP_EOP;
- cmd.eop.len = sizeof(cmd.eop);
-
+ cmd.op.type = OP_SET_TIME_TYPE_PPS;
+ cmd.op.time_secs = time_spec.secs;
+ cmd.op.time_ticks = time_spec.ticks;
+
pending_reply p(cmd.op.rid, &reply, sizeof(reply));
- if (!transmit_cmd_and_wait(&cmd, sizeof(cmd), &p, DEF_CMD_TIMEOUT))
+ if (!transmit_cmd_and_wait(&cmd, sizeof(cmd), &p, 4*DEF_CMD_TIMEOUT))
return false;
- return ntohx(reply.ok) == 1;
+ bool success = (ntohx(reply.ok) == 1);
+ return success;
}
bool
- usrp2::impl::sync_every_pps(bool enable)
+ usrp2::impl::set_time(const time_spec_t &time_spec)
{
- op_generic_cmd cmd;
- op_generic_t reply;
+ op_set_time_cmd cmd;
+ op_generic_t reply;
memset(&cmd, 0, sizeof(cmd));
- cmd.op.opcode = OP_SYNC_EVERY_PPS;
+ cmd.op.opcode = OP_SET_TIME;
cmd.op.len = sizeof(cmd.op);
cmd.op.rid = d_next_rid++;
- cmd.op.ok = enable ? 1 : 0;
- cmd.eop.opcode = OP_EOP;
- cmd.eop.len = sizeof(cmd.eop);
-
+ cmd.op.type = OP_SET_TIME_TYPE_NOW;
+ cmd.op.time_secs = time_spec.secs;
+ cmd.op.time_ticks = time_spec.ticks;
+
pending_reply p(cmd.op.rid, &reply, sizeof(reply));
- if (!transmit_cmd_and_wait(&cmd, sizeof(cmd), &p, DEF_CMD_TIMEOUT))
+ if (!transmit_cmd_and_wait(&cmd, sizeof(cmd), &p, 4*DEF_CMD_TIMEOUT))
return false;
- return ntohx(reply.ok) == 1;
+ bool success = (ntohx(reply.ok) == 1);
+ return success;
}
std::vector<uint32_t>
diff --git a/usrp2/lib/usrp2_impl.h b/usrp2/lib/usrp2_impl.h
index 8e5c532..fd14bc0 100644
--- a/usrp2/lib/usrp2_impl.h
+++ b/usrp2/lib/usrp2_impl.h
@@ -101,7 +101,7 @@ namespace usrp2 {
bool enable_gpio_streaming(int bank, int enable);
bool write_gpio(int bank, uint16_t value, uint16_t mask);
bool read_gpio(int bank, uint16_t *value);
- bool start_rx_streaming(unsigned int items_per_frame, const time_spec_t
*time_spec);
+ bool start_rx_streaming(unsigned int items_per_frame, const time_spec_t
&time_spec);
bool rx_samples(vrt::rx_packet_handler *handler);
bool stop_rx_streaming();
@@ -137,7 +137,7 @@ namespace usrp2 {
// misc
- bool config_mimo(int flags);
+ bool config_clock(const clock_config_t &clock_config);
bool fpga_master_clock_freq(long *freq);
bool adc_rate(long *rate);
bool dac_rate(long *rate);
@@ -147,8 +147,8 @@ namespace usrp2 {
// low level
bool burn_mac_addr(u2_mac_addr_t *new_mac);
- bool sync_to_pps();
- bool sync_every_pps(bool enable);
+ bool set_time_at_next_pps(const time_spec_t &time_spec);
+ bool set_time(const time_spec_t &time_spec);
std::vector<uint32_t> peek32(uint32_t addr, uint32_t words);
bool poke32(uint32_t addr, const std::vector<uint32_t> &data);
};
- [Commit-gnuradio] [gnuradio] 87/148: Removed references to channel numbers in usrp2 and gr usrp2. Removed the sample handler and replaced it with the vrt packet handler. Fixed the build systems to require vrt for usrp., (continued)
- [Commit-gnuradio] [gnuradio] 87/148: Removed references to channel numbers in usrp2 and gr usrp2. Removed the sample handler and replaced it with the vrt packet handler. Fixed the build systems to require vrt for usrp., git, 2016/08/14
- [Commit-gnuradio] [gnuradio] 117/148: typo fix, git, 2016/08/14
- [Commit-gnuradio] [gnuradio] 111/148: Merge branch 'master' of address@hidden:jblum into wip/usrp2, git, 2016/08/14
- [Commit-gnuradio] [gnuradio] 104/148: barebones udp support. Compiles, but untested., git, 2016/08/14
- [Commit-gnuradio] [gnuradio] 130/148: should fix the endless packet bug, git, 2016/08/14
- [Commit-gnuradio] [gnuradio] 106/148: proper time sync to pps, git, 2016/08/14
- [Commit-gnuradio] [gnuradio] 119/148: better debug pins, git, 2016/08/14
- [Commit-gnuradio] [gnuradio] 114/148: Merge branch 'wip/usrp2' of http://gnuradio.org/git/matt into wip/usrp2, git, 2016/08/14
- [Commit-gnuradio] [gnuradio] 116/148: actually connect the ports -- why this isn't flagged as an error I'll never know, git, 2016/08/14
- [Commit-gnuradio] [gnuradio] 134/148: remove time_sync and master_timer., git, 2016/08/14
- [Commit-gnuradio] [gnuradio] 136/148: Added set time and set time at next pps. Removed the old sync pps commands, they dont make sense to use anymore.,
git <=
- [Commit-gnuradio] [gnuradio] 107/148: added missing vrt includes and libs to makefiles, git, 2016/08/14
- [Commit-gnuradio] [gnuradio] 129/148: yet another typo, git, 2016/08/14
- [Commit-gnuradio] [gnuradio] 110/148: bug fix for waterfall plotter, it seems that numpy choose changed, git, 2016/08/14
- [Commit-gnuradio] [gnuradio] 138/148: speed up timing by ignoring the too_early error. We'll need to FIXME this later, git, 2016/08/14
- [Commit-gnuradio] [gnuradio] 126/148: add debug pins to find the problem with lost eof in the udp core, git, 2016/08/14
- [Commit-gnuradio] [gnuradio] 90/148: corrected some vrt header logic in tx samples, git, 2016/08/14
- [Commit-gnuradio] [gnuradio] 133/148: allow setting time immediately in cases where there is no external pps input, git, 2016/08/14
- [Commit-gnuradio] [gnuradio] 139/148: Merge branch 'usrp2_vrt' of http://gnuradio.org/git/matt into usrp2_vrt, git, 2016/08/14
- [Commit-gnuradio] [gnuradio] 109/148: Expanded the usrp props structure into something that can describe any kind of usrp: ethernet, udp, usb... and the various transport arguments., git, 2016/08/14
- [Commit-gnuradio] [gnuradio] 135/148: moved around regs, added a bit to allow for alternate PPS source, git, 2016/08/14