A second option for finding the signal is to use a FFT to do the correlation
instead of doing an actual correlation. This often lets you get very close
in both frequency and time (code phase) before turning on the FLL. Also
remember that the PLL used in GPS is typically a costas loop instead of a
full PLL because once you stop the phase rotation with the FLL and drive all
the power into I(in-phase) by forcing Q(quadrature) to zero in your loop,
the in-phase will continually flip sign due to the 20 ms data bits. Normal
PLLs hate this.
-----Original Message-----
From: Brent Ledvina [mailto:address@hidden
Sent: Saturday, August 16, 2003 6:39 PM
To: Krzysztof Kamieniecki
Cc: GNU-RADIO DISCUSS MAILING LIST
Subject: Re: [Discuss-gnuradio] GPS/DSSS question
Your algorithm should be modified in the following way:
1. Detect the code phase offset and carrier doppler shift using your
acquisition algorithm (by finding the peak signal power at a particular
Doppler offset).
2. Track the code offset using a delay-locked loop (DLL)
3. Track the carrier frequency using a FLL or the frequency and phase
using a PLL.
An good text on GPS receiver design using software receivers is
Fundamentals of Global Positioning Receivers: A Software Approach by
James Tsui, Wiley and Sons, 2000.
Regards,
Brent
On Saturday, August 16, 2003, at 08:14 PM, Krzysztof Kamieniecki wrote:
I've been working on my GPS software, and I have a question as to the
validity of one of my algorithms.
Simplified Background:
Each GPS satellite broadcasts a DSSS(Direct Sequence Spread
Spectrum) signal. The chipping rate is 1023M/s and the PRN code is
1023 chips long.
To lock onto a satellite signal you have to:
1. Find (and track) the correct carrier frequency (because of
Doppler / Relativity effects, Receiver effects, etc...)
2. Find (and track) the correct chip offset
3. Find (and track) the correct chipping rate (same problems at
carrier frequency, but this may not be a noticeable effect)
My Algorithm:
1. Look for signal peak by trying 1023 different chipping offsets at
frequencies separated by 200Hz
2. When a peak signal is found, measure the signal coming out of DSSS
integrators.
3. Adjust carrier NCO based on measured signal (frequency and phase
offset)
4. Activate carrier PLL
So the question is, Is step 3 valid thing to do, or do I need a more
complicated FLL/PLL?
--
Krzysztof Kamieniecki
mailto:address@hidden
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